Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] Adding "S" suffixed ARM/Thumb2 instructions"
2011 Feb 18
0
[LLVMdev] Adding "S" suffixed ARM/Thumb2 instructions
On Feb 17, 2011, at 10:35 PM, Вадим Марковцев wrote:
> Hello everyone,
>
> I've added the "S" suffixed versions of ARM and Thumb2 instructions to tablegen. Those are, for example, "movs" or "muls".
> Of course, some instructions have already had their twins, such as add/adds, and I leaved them untouched.
Adding separate "s" instructions is
2013 Oct 15
0
[LLVMdev] MI scheduler produce badly code with inline function
On Oct 14, 2013, at 3:27 AM, Zakk <zakk0610 at gmail.com> wrote:
> Hi all,
> I meet this problem when compiling the TREAM benchmark (http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched
>
> The small function will be scheduled as good code, but if opt inline this function, the inline part will be scheduled as bad code.
A bug for this is welcome. Pretty soon, I’ll
2013 Oct 14
2
[LLVMdev] MI scheduler produce badly code with inline function
Hi all,
I meet this problem when compiling the TREAM benchmark (
http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched
The small function will be scheduled as good code, but if opt inline this
function, the inline part will be scheduled as bad code.
so I rewrite a simple code as attached link (foo.c), and compiled with two
different methods:
*method A:*
*$clang -O3 foo.c -static -S
2010 Nov 12
2
[LLVMdev] Simple NEON optimization
Hi folks, me again,
So, I want to implement a simple optimization in a NEON case I've seen
these days, most as a matter of exercise, but it also simplifies (just
a bit) the code generated.
The case is simple:
uint32x2_t x, res;
res = vceq_u32(x, vcreate_u32(0));
This will generate the following code:
; zero d16
vmov.i32 d16, #0x0
; load a
2014 Sep 11
2
[LLVMdev] Is shortening a load a bug?
When the IR specifies a 32 bit load can it be changed to a narrower load?
What if the load is from memory (e.g. a peripheral) that only supports 32-bit
access?
Consider the following IR:
----
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32"
target triple = "thumbv7m-unknown-unknown"
@f = external global i32
define zeroext i8 @bar() nounwind {
L.0:
2011 Aug 10
2
using if then statements in a dataframe
I used this service several months ago and was very pleased with the response.
I have a dataframe with several thousand lines and to each line I need to apply a series of "if else" statements. For each row I need either a value or a blank/NA. Below is the series of if else statements I have been trying without success to integrate into a function such as "apply".
if
2016 Nov 28
2
Looking for help with an ast matcher
Hi Piotr,
I think I found a working matcher: match
ifStmt(hasCondition(implicitCastExpr(hasImplicitDestinationType(isInteger()),
has(cxxMemberCallExpr(callee(cxxMethodDecl(hasName("compare"))),
hasArgument(0, declRefExpr().bind("str2")),
callee(memberExpr(has(declRefExpr().bind("str1"))))))))).bind("case1")
This one bind to both str1 and str2 in
2016 Nov 28
2
Looking for help with an ast matcher
Hi Piotr,
Thanks. Yeah, it seemed a little weird, but it was what got me closest. I
found out that the matcher I supplied here was working for clang-query
3.8.1. I'm working on a clang-tidy module for 4.0.0 - it's not working
there.
Could you elaborate on the "onImplicitObjectArgument"? There is no document
on it on the clang page. So I wouldn't know how it works or what it
2016 Nov 27
2
Looking for help with an ast matcher
Adding cfe-dev, because it is related to clang, not LLVM.
2016-11-27 22:34 GMT+01:00 Piotr Padlewski <piotr.padlewski at gmail.com>:
> Hi Mads,
> Can you provide the code that you run clang-query on, or at least AST for
> the fragment you want to match?
>
> Piotr
>
> 2016-11-26 22:27 GMT+01:00 Mads Ravn via llvm-dev <llvm-dev at lists.llvm.org
> >:
>
2008 Jan 06
4
[LLVMdev] Another memory fun
Yes, I agree with you
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2008 Jan 06
4
[LLVMdev] Another memory fun
Hey again)
Now I have next code:
; ModuleID = 'sample.lz'
@.str1 = internal global [8 x i8] c" world!\00" ; <[8 x i8]*>
[#uses=1]
@.str2 = internal global [8 x i8] c"hello, \00" ; <[8 x i8]*>
[#uses=1]
@.str7 = internal global [21 x i8] c"welcome to out hall!\00" ;
<[21 x i8]*> [#uses=1]
declare i32 @puts(i8*)
2008 Jan 06
0
[LLVMdev] Another memory fun
but why this code don't work:
; ModuleID = 'sample.lz'
@.str1 = internal global [6 x i8] c"world\00" ; <[6 x i8]*>
[#uses=1]
@.str2 = internal global [7 x i8] c"hello \00" ; <[7 x i8]*>
[#uses=1]
@.str7 = internal global [7 x i8] c"father\00" ; <[7 x i8]*>
[#uses=1]
@.str8 = internal global [8 x i8]
2015 Apr 20
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Dear community,
I faced with code which was generated by llvm, assembly instructions of that code is relying on 8-bytes alignment for structures on the stack.
The part of Objective C code is following:
-(void)getCharacters:(unichar *)unicode {
NSRange range;
range.location = 0;
range.length = [self length];
printf("%p, %p\n", &range.location, &range.length);
And
2006 Nov 12
4
[LLVMdev] need help understanding getelementptr assembler instruction
I am trying to understand the hello word assember example. This is
my version:
%str1 = internal constant [13 x sbyte] c"Hello World\0a\00"
declare int %printf(sbyte*, ...)
implementation ; Functions:
int %main() {
%str2 = getelementptr [13 x sbyte]* %str1, long 0, long 0
call int(sbyte*, ...) *%printf(sbyte* %str2)
ret int 0
}
Why is getelementptr being given two "long
2011 Jan 10
2
[LLVMdev] ARM/MC/ELF Support for pcrel movw/movt coming soon
Hi everyone, happy new year.
This note is to announce that support for PC relative reloc tags for
movw/movt is nearing completion (hopefully <48hrs!). This work is is
from Jan Voung, David Meyer and myself.
Unfortunately, to test this change, we need to patch ARM/AsmParser to
address http://llvm.org/bugs/show_bug.cgi?id=8721
Locally, we have hacked up a solution to 8721, but its not ideal
2016 Nov 26
2
Looking for help with an ast matcher
Hi,
Hope this is the right channel for this question. I am trying to make an
ast matcher for clang-tidy to find str1.compare(str2), where both str1 and
str2 are std::string. I have this so far: http://i.imgur.com/sUma9WC.png .
But I am having a hard time finding a way to bind an id to the str1 part of
the expression.
Can anyone help me out with an idea?
Best regards,
Mads Ravn
--------------
2003 Feb 20
2
is.numeric
Hi,
I have a vector, which contains both strings and numbers, e.g.
> foo <- c("str1",1234,"str2",0.9876)
I want to know if a distinct element of the vector is a string or a number and
took "is.numeric", but
> is.numeric(foo[2])
[1] FALSE
because R treats the numbers in a mixed vectors as strings:
> foo
[1] "str1" "1234"
2011 Jan 10
2
[LLVMdev] ARM/MC/ELF Support for pcrel movw/movt coming soon
-llvmcommits
On Mon, Jan 10, 2011 at 3:21 PM, Renato Golin <renato.golin at arm.com> wrote:
> Btw, I know this is for ELF printing, but can the same infrastructure
> you're using to print the hi/lo be used to print relocation in Asm
> output? Or is this a completely separate subject?
Hi Renato,
If I am understanding you correctly, then the answer is no, because .s
output
2012 Feb 02
1
gsub syntax help
I have some elements in a vector with extraneous information (e.g. file
name and sample IDs) that I'd like to strip from every element.
For example, I would like "SPI1.S1.str1.P3.sample.tif"
"SPI1.S1.STR2.P1.sample.tif" to read "SPI1.S1.str1.P3" "SPI1.S1.STR2.P1".
Will someone help me with the syntax in gsub? It needs to be something
like
2009 Sep 27
5
[LLVMdev] A basicblock iterator bug in llvm
Dear developers:
When I am doing basicblock pass, I meet a bug: there is an
iterator "I" in a basicblock, and it is not pointing to the first
instruction in this basicblock. However, "I--;" will fail by an
assertion.
The basic block ("I" is pointing to the second instruction) in test.ll:
bb: ; preds = %bb1
%1 = call i32 (i8*, ...)* @printf(i8* noalias