Displaying 20 results from an estimated 100 matches similar to: "[LLVMdev] PR9112"
2012 Jun 03
1
[LLVMdev] Constant::getAllOnesValue(): expected behaviour or bug?
Hi,
I was playing with the Constant::getAllOnesValue() method and found that it doesn't handlesPointerTypes correctly. When receiving a "i32*" argument, it was returning with some big integer vector, such as <12113216 x i32>.
When you call this method passing a PointerType, the following code is executed:
00152 VectorType *VTy = cast<VectorType>(Ty);00153 return
2012 May 21
3
[LLVMdev] Bug in SUB expansion going back to LLVM 2.6
I found a bug in the expansion code for SUB going back to at least LLVM 2.6 and still shows up in trunk.
case ISD::SUB: {
EVT VT = Node->getValueType(0);
assert(TLI.isOperationLegalOrCustom(ISD::ADD, VT) &&
TLI.isOperationLegalOrCustom(ISD::XOR, VT) &&
"Don't know how to expand this subtraction!");
Tmp1 = DAG.getNode(ISD::XOR, dl,
2009 Jul 30
2
[LLVMdev] Vector logic regression in r73431
Hi all,
Hi Eli,
No, that appears to be something unrelated. I'm currently using revision
75246, while that patch only seems to apply to some later revision.
Anyway, I actually located the real bug. Right at the end of
InstCombiner::SimplifyDemandedUseBits, there's this piece of code:
// If the client is only demanding bits that we know, return the known
// constant.
if
2009 Jul 30
0
[LLVMdev] Vector logic regression in r73431
On Thu, Jul 30, 2009 at 5:57 AM, Nicolas Capens<nicolas at capens.net> wrote:
> No, that appears to be something unrelated. I'm currently using revision
> 75246, while that patch only seems to apply to some later revision.
I don't see the connection... anyway, I can't easily help you with an
old revision.
> Anyway, I actually located the real bug. Right at the end of
2012 May 21
0
[LLVMdev] Bug in SUB expansion going back to LLVM 2.6
On May 21, 2012, at 11:21 AM, Villmow, Micah wrote:
> I found a bug in the expansion code for SUB going back to at least LLVM 2.6 and still shows up in trunk.
> case ISD::SUB: {
> EVT VT = Node->getValueType(0);
> assert(TLI.isOperationLegalOrCustom(ISD::ADD, VT) &&
> TLI.isOperationLegalOrCustom(ISD::XOR, VT) &&
> "Don't
2016 May 03
3
Reasoning about known bits of the absolute value of a signed integer
I'm trying to reason about how to find certain bit positions of the absolute value of a given integer value. Specifically, I want to know the highest possibly set bit and lowest possibly set bit of the absolute value, in order to find the range between the two.
Note that I'm specifically trying to be as conservative as possible.
This is what I have so far:
If the sign bit of the
2013 Nov 05
0
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
I think I understood the problem you're trying to solve. I didn't, however,
understand the problems you are having (maybe you're not running mem2reg?).
I do have a little piece of code that I think does (more or less) what you
want.
Take a look at it, try understanding it, and see if it helps you out.
You might have to change it a bit since you're replacing uses after an
2019 Mar 18
2
How to get the possible predecessors for a PHINode
Hi all,
I have encountered the following instruction:
%.0.i = phi i8* [ %9, %8 ], [ %11, %10 ]
How can I get the %8 and %10?
I'm using http://llvm.org/doxygen/classllvm_1_1PHINode.html as a reference
but I cannot understand how to do that.
Thanks
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2013 Nov 05
1
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
Thanks for the reply.
For the source code:
int main()
{
int a = 0;
int *p;
p = &a;
call_arnamoy(p);
int *p1;
p1 = p;
return 1;
}
The bit code:
%retval = alloca i32, align 4
%a = alloca i32, align 4
%p = alloca i32*, align 8
%p1 = alloca i32*, align 8
store i32 0, i32* %retval
store i32 0, i32* %a, align 4
store i32* %a, i32** %p, align 8
%0 = load i32** %p, align 8
%call = call i32
2005 Jul 29
0
[LLVMdev] patch for pointer-to-array conversion
The enlosed patch for IndVarSimplify.cpp works even when the pointer
increment is deeply nested wrt pointer initialization, but note that it
needs to have loop structures preserved, as in the following:
int A[3000000], B[20000], C[100], Z;
volatile int I, J, K;
int main()
{
int i, j, k, *a, *b, *c;
for ( a = &A[0], i = 0; i != 300; i++ )
{
I++;
2013 Mar 02
2
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes
Hi folks,
Hope this is not a silly question. But it bothers me when I am thinking
about it.
My question is:
1. In the implementation of serverSplitPHINodes(), why it only checks the
first PHI node for possible
multiple inputs from outside the region to extract. There could be more
than one PHI nodes in the header
block, and the code only checks the first one. I don't quite get it.
2017 May 01
4
RFC: Stop using redundant PHI node entries for multi-edge predecessors
Hi,
On Mon, May 1, 2017 at 8:47 AM, Daniel Berlin via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>> Today, the IR requires that if you have multiple edges from A to B
>> (typically with a switch) any phi nodes in B must have an equal number of
>> entries for A, but that all of them must have the same value.
>
>> This seems rather annoying....
>> 1) It
2013 Nov 05
2
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
Hello all;
So here is my goal:
*** If there is a Call instruction to myFunction(int * val), I need to
identify all the instructions that uses val in the IR and replace the
uses with a newly created pointer. I will also be changing the
argument of myFunction to the new pointer.
int * val = malloc/calloc;
...
myFunction(val);
....
*val = 45;
becomes==
int * val = malloc/calloc;
int * val1 =
2008 Nov 21
2
[LLVMdev] computeMaskedBitsforTargetNode
Can someone explain what this function is supposed to do? I've looked at
PowerPC, Sparc, etc.. and can't really figure out what I should be doing
here.
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2009 Jul 29
0
[LLVMdev] Vector logic regression in r73431
On Wed, Jul 29, 2009 at 3:45 AM, Nicolas Capens<nicolas at capens.net> wrote:
> So could anyone who knows the ins and outs of this code have a look at how
> to make it handle vectors correctly? Or if that’s not an option right now,
> please revert the broken optimizations. Note that there might be more things
> affected than visitAnd, visitOr and vistXor, I’ve only been able to
2020 Mar 18
2
valid BasicAA behavior?
Am Di., 17. März 2020 um 16:56 Uhr schrieb Chawla, Pankaj via llvm-dev
<llvm-dev at lists.llvm.org>:
> All I am expecting from DA is a direction vector containing (*).
There seems to be a bug in DI, see Felipe's answer.
> I think the main problem is that currently there is no exact way DA can query AliasAnalysis in a ‘conservatively correct’ manner.
>
> Using UnknownSize
2009 Jul 29
3
[LLVMdev] Vector logic regression in r73431
Hi All,
I found a regression which triggers the asserts: "Binary operator types must
match!" and "Op types should be identical!". It's happening with a piece of
vector code, and the asserts happen because a logic operation is attempted
between a vector and a scalar (which is not present in the original code,
but created by InstCombine).
It's caused by revision
2018 Jun 12
2
One more No-alias case on Alias analysis
On 06/11/2018 02:33 PM, Friedman, Eli via llvm-dev wrote:
> On 6/11/2018 10:06 AM, jingu at codeplay.com via llvm-dev wrote:
>> Hello All,
>>
>> I have met one may-alias case from llvm's alias analysis. The code
>> snippet is as following:
>>
>> char buf[4];
>>
>> void test (int idx) {
>> char *a = &buf[3 - idx];
>> char *b =
2006 May 17
0
[LLVMdev] Obfuscation with LLVM
Hi all,
I was trying to implement an obfuscation tool for C-code on the basis of
LLVM. I got a prototype of the simple obfuscation transformation which
converting control flow graph to something like a state machine. I am not
sure I will have time to work on extending further this tool with new
transformations like opaque predicates and decided to put here source code I
have by now with hope
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 5:26 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
>> Can you explain why you chose the approach of using a new pass?
>> I pictured removing LegalizeDAG's type legalization code would
>> mostly consist of finding all the places that use TLI.getTypeAction