similar to: [LLVMdev] know if individual LLVM's Instruction has a result, and how to obtain it?

Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] know if individual LLVM's Instruction has a result, and how to obtain it?"

2011 Jan 19
0
[LLVMdev] know if individual LLVM's Instruction has a result, and how to obtain it?
Hi Chuck, > Most LLVM IR instructions have a result field, according to the Language Reference. > > I want to know, for all LLVM Instructions, is there an easy and consistent way > to know if the current Inst has a result field? > And if yes, what is the best way to obtain it? the instruction is the result! So everywhere you though you needed to use Instruction->getResult(),
2010 Apr 12
0
[LLVMdev] Why function pointer is different from other data type?
Hao Shen wrote: > Dear all, > > I compiled c program with llvm and found something strange with > function pointer as following small example . > > ------------- In C Code -------------- > float a (int value) { > return value + 1; > }; > > typedef float (*funcptr_t) (int); > > funcptr_t get_ptr(funcptr_t p) { > return p; > } > > float
2010 Apr 12
5
[LLVMdev] Why function pointer is different from other data type?
Dear all, I compiled c program with llvm and found something strange with function pointer as following small example . ------------- In C Code -------------- float a (int value) { return value + 1; }; typedef float (*funcptr_t) (int); funcptr_t get_ptr(funcptr_t p) { return p; } float result = get_ptr(a)(4); ------------- In LLVM Code -------------- %4 = call float (i32)* (float
2011 Jan 06
2
[LLVMdev] What are all the LLVM IRs that will write into memory?
LLVMers, I need to intercept all LLVM IR instructions that will write into memory and start to do analysis on these instructions. In addition to StoreInst, what are all other IRs that will write into memory? E.g. char * ptr = malloc(...); ///... //with use(s) of ptr later The LLVM IR for the above code would be: %0 = tail call noalias i8* @malloc(i32 137) nounwind ///... //
2015 Aug 10
5
RFC: Add "operand bundles" to calls and invokes
We'd like to propose a scheme to attach "operand bundles" to call and invoke instructions. This is based on the offline discussion mentioned in http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/088748.html. # Motivation & Definition Our motivation behind this is to track the state required for deoptimization (described briefly later) through the LLVM pipeline as a
2017 Nov 29
3
RFC: Adding 'no-overflow' keyword to 'sdiv'\'udiv' instructions
Introduction: We would like to add new keyword to 'sdiv'\'udiv' instructions i.e. 'no-overflow'. This is the updated solution devised in the discussion: http://lists.llvm.org/pipermail/llvm-dev/2017-October/118257.html The proposed keywords: "nof" stands for 'no-overflow' Syntax: <result> = sdiv nof <ty> <op1>,
2009 Sep 02
1
[LLVMdev] LangRef description of 'add nsw' doesn't match reality
The langref says for the 'add' instruction: Syntax: <result> = add <ty> <op1>, <op2> ; yields {ty}:result <result> = nuw add <ty> <op1>, <op2> ; yields {ty}:result <result> = nsw add <ty> <op1>, <op2> ; yields {ty}:result <result> = nuw nsw add <ty> <op1>, <op2> ;
2015 Aug 19
2
RFC: Add "operand bundles" to calls and invokes
----- Original Message ----- > From: "David Majnemer" <david.majnemer at gmail.com> > To: "Sanjoy Das" <sanjoy at playingwithpointers.com> > Cc: "llvm-dev" <llvm-dev at lists.llvm.org>, "Philip Reames" > <listmail at philipreames.com>, "Chandler Carruth" > <chandlerc at gmail.com>, "Nick
2010 Jul 23
1
[LLVMdev] "Attribute" Translation
Hey all, Could anyone give me any hint on how llvm-g++ translates the "__attribute__" annotations (supported by GCC)? (Has GCC already implemented the support for the C++0x attributes?) Suppose a class definition as below: template <typename T> class __attribute__((may_alias)) list { ... }; I understand that each particular attribute may be handled differently. Assuming that
2013 Nov 25
2
[LLVMdev] Language Reference bug?
Hi, The language reference uses "::" many places where it seems it should be using ".. code-block:: llvm". The result is that Sphinx does not colorize these samples. Should I fix this? Or is it purposeful? Also, anybody but me that has noticed that Sphinx does not always colorize things even if you put the proper ".. code-block:: llvm" in front? If it is a known
2017 Apr 04
3
RFC: Adding a string table to the bitcode format
On Tue, Apr 4, 2017 at 12:36 PM, Duncan P. N. Exon Smith < dexonsmith at apple.com> wrote: > > On 2017-Apr-04, at 12:12, Peter Collingbourne <peter at pcc.me.uk> wrote: > > On Mon, Apr 3, 2017 at 8:13 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > >> >> On Apr 3, 2017, at 7:08 PM, Peter Collingbourne <peter at pcc.me.uk> wrote: >>
2008 Sep 11
0
[LLVMdev] Tail-calling
On Thu, Sep 11, 2008 at 4:31 PM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com> wrote: > Tail calls through function pointers should work.If not please send a testcase. > > I just added the two examples from the bug (1392) that calls for true > tail call support. They work on my machine (-tailcallopt needs to be > enabled) ;) > > That would be commit 56127. >
2013 Nov 25
0
[LLVMdev] Language Reference bug?
On Sun, Nov 24, 2013 at 10:19 PM, Mikael Lyngvig <mikael at lyngvig.org> wrote: > Hi, > > The language reference uses "::" many places where it seems it should be > using ".. code-block:: llvm". The result is that Sphinx does not colorize > these samples. > > Should I fix this? Or is it purposeful? > Could you give an example of what you are
2008 Sep 11
3
[LLVMdev] Tail-calling
Tail calls through function pointers should work.If not please send a testcase. I just added the two examples from the bug (1392) that calls for true tail call support. They work on my machine (-tailcallopt needs to be enabled) ;) That would be commit 56127. regards On Thu, Sep 11, 2008 at 11:21 PM, Evan Cheng <evan.cheng at apple.com> wrote: > Arnold implemented tail call. We
2011 Jan 21
1
[LLVMdev] all LLVM Instructions that may write to memory -- other than StoreInst?
John, Thanks for the reply. I agree with your comments that the "Memory" LLVM Spec refers to doesn't include stack. Let me leverage a bit further: If I need to work on high-level IRs (not machine dependent, not in the code-gen stage), is it reasonable to assume that ALL LLVM IRs that have a result field will have potential to write stack? E.g. <result> =
2011 Sep 06
2
[LLVMdev] bitwise AND
Hi, I want to compute the bitwise 'and' between two values of type int1:  %x = and %a, %b  . Which is the LLVM instruction that creates this? I only found the APInt class, whose constructor is:  APInt(unsigned numBits, uint64_t val, bool isSigned = false) and which provides the bitwise AND operation: APInt  llvm::APIntOps::And (const APInt &LHS, const APInt &RHS)   Bitwise
2010 Sep 08
5
Newbie cross tabulation issue
hi, i'm new in R and i need some help. Please, ¿do you know a function how can process cross tables for many variables and show the result in one table who look like this?: +----------------------------------------------------+ |------------------ | X variable | |----------------- | Xop1 | Xop2 | Xop3|.....| +----------------------------------------------------+ |Yvar1 |
2010 Sep 29
2
[LLVMdev] comparison pattern trouble
Our architecture has 1-bit boolean predicate registers. I've defined comparison def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>; But then I end up having the following bug: Code %0 = zext i8 %data to i32 %1 = zext i16 %crc to i32 %2 = xor i32 %1, %0 %3 = and i32 %2, 1 %4 =
2008 Sep 12
3
[LLVMdev] Difficulty with reusing DAG nodes.
I'm trying to implement *MUL_LOHI for my processor. My processor has mulxss (e.g.) that gives the 32 high bits of a 64 bit multiply. I tried this in ios2ISelDAGToDAG.cpp: /// Mul/Div with two results case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: { SDValue Op1 = Node->getOperand(0); SDValue Op2 = Node->getOperand(1); AddToISelQueue(Op1);
2011 Jan 21
0
[LLVMdev] all LLVM Instructions that may write to memory -- other than StoreInst?
On 1/21/11 2:50 PM, Chuck Zhao wrote: > I need to figure out all LLVM Instructions that may write to memory. > > In http://llvm.org/docs/tutorial/OCamlLangImpl7.html, it mentions that > "In LLVM, all memory accesses are explicit with load/store > instructions, and it is carefully designed not to have (or need) an > "address-of" operator." > > I take