similar to: [LLVMdev] About adding a pass into llvm, cont

Displaying 20 results from an estimated 700 matches similar to: "[LLVMdev] About adding a pass into llvm, cont"

2011 Jan 18
1
[LLVMdev] adding a codegen pass into llvm
Thanks for your last reply. Could I understand the way to adding a pass (built into the llvm rather than dynamic loadable) includes: 1. Declaring a creator function for this pass 2. Implementing the creator function for this pass 3. Instantiating this pass and get a object of it 3. Register this pass into the PassRegistry Then, for a built-into bytecode pass, task 1(declaration of the
2011 Jan 12
1
[LLVMdev] About adding a pass into llvm
I have seen INITIALIZE_PASS(LiveVariables, "livevars", "Live Variable Analysis", false, false); in the llvm/lib/codegen/LiveVariables.cpp, where LiveVariables is a subclass of MachineFunctionPass, and #define INITIALIZE_PASS(passName, arg, name, cfg, analysis) \ static RegisterPass<passName> passName ## _info(arg, name, cfg, analysis) in PassSupport.h Is this code used
2011 May 16
0
[LLVMdev] Upgrading to llvm-2.9
namespace llvm { class PassRegistry; void initializeFooPass(PassRegistry&); } using namespace llvm; namespace { class Foo : public ModulePass { public: static char ID; Foo() : ModulePass(ID) { initializeFooPass(*PassRegistry::getPassRegistry()); } bool runOnModule(Module& M) { M.dump(); return false; } }; } char Foo::ID = 0;
2011 May 30
1
[LLVMdev] about writing a functionpass requiring a modulepass
---------- Forwarded message ---------- From: Qingan Li <ww345ww at gmail.com> Date: 2011/5/30 Subject: To: llvmdev at cs.uiuc.edu Hi, I wrote an analysis pass, myPass, inherited from both ModulePass and ProfileInfo, and this pass requires the CallGraph, i.e., * class myPass : public ModulePass, public ProfileInfo { ...};* * void myPass::getAnalysisUsage(AnalysisUsage &AU) const
2013 Jun 24
0
[LLVMdev] About writing a modulePass in addPreEmitPass() for NVPTX
I try to use INITIALIZE_PASS instead of RegisterPass<> to register my pass, though I don't understand what's their difference and how it works because its documents doesn't exist. But it still doesn't work. Parts of my codes is as follows: in NVPTXTest.h namespace llvm { void initializeNVPTXTestPass(PassRegistry &r); class NVPTXTest : public ModulePass { public:
2011 Jan 10
1
[LLVMdev] About NDEBUG (Cont)
Hi Li Qingan, > Thanks for your last reply. > I have made a critical mistake when I stated my question in last email. > I built llvm in debug mode, but the NDEBUG seemed to be still defined, such that > the -debug option is not enabled. > I have restated my configuration below. you need to configure with --enable-assertions In spite of the name, NDEBUG is not related to
2013 Jun 24
2
[LLVMdev] About writing a modulePass in addPreEmitPass() for NVPTX
Sorry for the delay. Yeah, that error message is a bit confusing. What's happening is that your pass sequence is invalid. Once the IR has been lowered to machine code, its too late to run LLVM IR passes (ModulePass, FunctionPass, CallGraphSCCPass, etc.). At that point, you need to run a Machine*Pass, e.g. MachineFunctionPass. If you need to run an IR level pass, you need to use
2015 Aug 21
2
Guidelines for pass initialization?
Let me rephrase to make sure I understand. Once we have this settled, I'll update the comments in the file to summarize and possibly update the docs. On 08/21/2015 10:27 AM, Owen Anderson wrote: > The macro versions should be preferred, as they reduce static initializaters. Makes sense. But the tradeoff is that they need to be baked into the list of known passes so that someone knows
2010 Jul 21
0
[LLVMdev] API CHANGE: RegisterPass going away
Hey folks, As part of our ongoing quest to eliminate static constructors from the LLVM libraries (in order to improve startup times for applications that link against them), I'm going to be eliminating the RegisterPass class. They will be replaced with an initialization-function based system that I will detail in a future email. But, for now, what you need to know is that these classes are
2011 May 16
2
[LLVMdev] InstructionCombining.cpp inconsistency in whether it modifies the CFG?
InstCombine says in its getAnalysisUsage that it preserves the CFG, but for the 4th argument in its INITIALIZE_PASS call, it says false, which I believe corresponds to whether it preserves the CFG. Is this a mistake, or is there deeper meaning here? InstructionCombining.cpp:73-82 char InstCombiner::ID = 0; INITIALIZE_PASS(InstCombiner, "instcombine", "Combine
2013 Mar 15
0
[LLVMdev] write a simple MachineFunctionPass
I found that : "Code generator passes are registered and initialized specially by TargetMachine::addPassesToEmitFile and similar routines, so they cannot generally be run from the *opt* or *bugpoint* commands."...So how I can run a MachineFunctionPass? In the end, I just want to apply a DFS on a CFG of a function. And I need oriented edges and wanted to use
2011 May 16
0
[LLVMdev] InstructionCombining.cpp inconsistency in whether it modifies the CFG?
Hi Michael, > InstCombine says in its getAnalysisUsage that it preserves the CFG, > but for the 4th argument in its INITIALIZE_PASS call, it says false, > which I believe corresponds to whether it preserves the CFG. that argument should be set to true if the pass only looks at the CFG, i.e. whatever it computes/does is only a function of the CFG, and doesn't otherwise depend on what
2013 Mar 15
2
[LLVMdev] write a simple MachineFunctionPass
Hello everyone, I have written several complex passes till now, but I cannot write a MachineFunctionPass pass. It just gives me segfault. Hence I reduced the pass to the following form : using namespace llvm; namespace { class CFGexplorator : public MachineFunctionPass { public: static char ID; // Pass identification, replacement for typeid CFGexplorator() : MachineFunctionPass(ID)
2014 Oct 14
2
[LLVMdev] Problem of stack slot coloring
Hal's advice helps me a lot to understand the implementation much better. Thanks so much! So, now I am able to state my problem more clearly: 1) There are two kinds of locals, i.e., the local variables originated from the source code (like C/C++), and the compilation generated temporaries. After instruction selection phase, the former is seen as frame indexes, while the latter is seen as
2011 Jan 14
0
[LLVMdev] About test suits Cont
On Jan 13, 2011, at 6:22 PM, Qingan Li wrote: > make[4]: Entering directory `/home/qali/build/llvm-2.8-rev/projects/test-suite/SingleSource/UnitTests/Vector/SSE' > /home/qali/Src/llvm-2.8/autoconf/mkinstalldirs Output > /dev/null > /home/qali/build/llvm-gcc4.2-2.8-x86_64-linux/bin/llvm-gcc -I/home/qali/build/llvm-2.8-rev/projects/test-suite/SingleSource/UnitTests/Vector/SSE
2011 May 16
2
[LLVMdev] Upgrading to llvm-2.9
Hi, Is the RegisterPass interface still supported, or do we have to use the INITIALIZE_PASS construct to register passes? Thanks, Arushi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110516/98bc0ab0/attachment.html>
2015 Aug 21
2
Guidelines for pass initialization?
Does anyone know what the guidelines are supposed to be for properly initializing a pass? Looking around, we seem to have three styles of pass registration in use. INITIALIZE_PASS(...) INITIALIZE_PASS_BEGIN(...) INITIALIZE_PASS_DEPENDENCY(...) ... INITIALIZE_PASS_END(...) static RegisterPass<FooPass> X(...); (This is the one encouraged in the docs, but seemingly the least widely used
2016 May 06
2
Spill code
Hi, Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:
2016 May 04
3
status of IPO/IPCP?
Sean Silva via llvm-dev <llvm-dev at lists.llvm.org> writes: > No tests fail with the patch below, so I would say it's pretty useless. It > seems that the C bindings are the only user but we can probably just have them > return IPSCCP instead. I don't necessarily think your conclusion is wrong, but the patch isn't proving what you think it's proving. In fact, the
2005 May 11
0
[LLVMdev] Re:RE: Question about inserting instructions
On Wed, May 11, 2005 at 01:30:29PM -0700, Qiuyu Zhang wrote: [snip] > push %eax > das > clc > > all of them are legal one-byte x86 machine instructions. [snip] > If there is a way to be able to get that, I am supposed that like > the following, > > 1. generate some dummy BB on IR level ( working on *.bc by writing a