Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] Problems compiling for new back-end"
2010 Nov 26
0
[LLVMdev] Problems compiling for new back-end
Hello Per,
> ...and the output has the x86_64 triple and datalayout anyway. How are you
> supposed to develop new back-ends if neither compiler can cross-compile?
> Target is a DSP, so native compile is entirely impossible.
clang support for cross-compilation definitely requires alot of care.
It the meantime you can forward a target triplet to clang via
-ccc-host-triple hidden command
2010 Nov 29
1
[LLVMdev] Problems compiling for new back-end
This worked quite well! Seems to me it definitely shouldn't be a hidden
option.
Compiling with the new (correct) triple, llvm has started taking the
register arguments and putting them on the stack. Is there an easy way to
stop this, or do I have to match/rebuild the dag somehow?
//Per
On Fri, Nov 26, 2010 at 10:14 AM, Anton Korobeynikov <
anton at korobeynikov.info> wrote:
>
2010 Nov 29
3
[LLVMdev] FunctionType as a function argument
Hi all.
I would like to declare a function that takes a function pointer as an
argument.
In C, it would be :
void execute(char (*func)(void*), void *param)
So, in my compiler, I have :
std::vector<const Type *> cbFPtrArgs(1, Type::getInt8PtrTy(C));
FunctionType * cbFPtrTy = FunctionType::get(Type::getInt8Ty(C), cbFPtrArgs,
false);
Function * func =
2010 Nov 29
0
[LLVMdev] FunctionType as a function argument
You need a pointer-to-function type, but FunctionType just gives you a
function type. Use PointerType::getUnqual(FunctionType::get(...)). Or
TypeBuilder<char (*func)(void*), false>::get(context) from
Support/TypeBuilder.h.
On Mon, Nov 29, 2010 at 10:37 AM, Salomon Brys <salomon.brys at gmail.com>wrote:
> Hi all.
> I would like to declare a function that takes a function pointer
2011 Feb 16
2
[LLVMdev] verbosity while invoking clang
I am working on implementing a new target for llvm.
So far (to make debugging easier), I was compiling a C code into 2 steps:
1) generate the llvm file:
clang -ccc-host-triple mytarget -emit-llvm -S myfile.c -o myfile.ll
2) generate the assembly file using
llc -march=mytarget myfile.ll
Sometimes, I add some verbosity for the 2nd command like "-print-after-all".
Now, I'd like to
2011 Feb 16
0
[LLVMdev] verbosity while invoking clang
On Feb 16, 2011, at 11:08 AM, Damien Vincent wrote:
> I am working on implementing a new target for llvm.
> So far (to make debugging easier), I was compiling a C code into 2 steps:
> 1) generate the llvm file:
> clang -ccc-host-triple mytarget -emit-llvm -S myfile.c -o myfile.ll
> 2) generate the assembly file using
> llc -march=mytarget myfile.ll
>
> Sometimes, I add
2009 Oct 10
1
field names as function parameters
Hi,
I am passing a data frame and field name to a function. I've figured out how
I can create the formula based on the passed in field name, but I'm
struggling to create a vector based in that field.
for example if I hard code with the actual field name
Y = df$Target, everything works fine.
but if I use the passed in parameter name, it doesn't give me what I want,
Y = df$mytarget
2009 Oct 11
3
passing field name parameter to function
Hi,
I am passing a data frame and field name to a function. I've figured out how
I can create the formula based on the passed in field name, but I'm
struggling to create a vector based in that field.
for example if I hard code with the actual field name
Y = df$Target, everything works fine.
but if I use the passed in parameter name, it doesn't give me what I want,
Y =
2011 Mar 10
2
[LLVMdev] How to make release branch available in git (topic changed)
On 03/10/2011 02:53 AM, Anton Korobeynikov wrote:
> Hi Tobias,
>
>> The following expression e.g.
>>
>> /^.*(?<!trunk|RELEASE_2.).$/m
>>
>> uses lookbehind to matches on:
> Thanks. Clever trick, but...
>
> Variable length lookbehind not implemented in regex
> m/^.*(?<!trunk|RELEASE_2.).$/ at /usr/lib/git-core/git-svn line 4078.
>
> :(
I
2014 Oct 10
2
[LLVMdev] eliminateFrameIndex
Hi!
I started writing a LLVM backend for a custom architecture. I have some register and instruction .td files and some other files/classes like a MCStreamer for assembler output. At the moment I can compile some empty programs so far.
I implemented the method ::eliminateFrameIndex() similar to the Sparc and ARM backend. The method looks like this:
// frame pointer is in reg of class
2011 Mar 08
2
[LLVMdev] How to make release branch available in git (topic changed)
On 03/07/2011 08:30 PM, Anton Korobeynikov wrote:
> Hi David
>
>> I think the trouble with branches is the lockdown of the root repository
>> directory.
> Surely not (at the server)
>
>> git svn init --stdlayout https://<user>@llvm.org/svn/llvm-project/llvm \
>>
2010 Dec 07
1
[LLVMdev] test-suite for 2.8
Bill Wendling <wendling at apple.com> writes:
> On Dec 6, 2010, at 9:31 AM, David Greene wrote:
>
> Is there a reason there is no RELEASE_28 tag for test-suite?
>
> SVN wouldn't allow me to make one.
So getting the latest release_28 branch should be equivalent, yes?
I just want to make sure we have a way to test 2.8 long-term.
-Dave
2011 Oct 06
0
[LLVMdev] svnsync of llvm tree
Oliver Schneider <gmane at assarbad.net> writes:
>>> However, we have official git mirrors of most of the projects on
>>> llvm.org, would using them instead of svnsync be an option for you?
>>
>> Well, if the authoritative source code control system for all the
>> llvm projects is svn, I'd just as soon use svn as the tool at my end.
> The git
2015 Apr 07
2
[LLVMdev] How to see what's going on behind llc through clang/clang++
Hi,
Is there a way to see what the default argument llc takes from
clang/clang++ ? I'm debugging my backend with a very simple c++ program.
Running through
*clang++ -target myTarget -S simple.cpp -o simple.s * (bug does no show up)
gives me different results from
*clang++ -target myTarget -S -emit-llvm -o simple.cpp -o simple.ll*
*llc simple.ll -o simple.s *(bug shows up)
Just trying to
2014 Nov 05
2
[LLVMdev] Virtual register def doesn't dominate all uses
Hi Quentin,
Am 03.11.2014 um 23:30 schrieb Quentin Colombet <qcolombet at apple.com>:
>> Continuing at 4309
>> Match failed at index 4310
>> Continuing at 4322
>> Morphed node: 0x7fef2a033610: i32 = MVrr 0x7fef2a033610 [ORD=21]
>>
>>
>> Does the add operation become a MOVE instruction, or is this a chain of rules?
>
> Yes, your add becomes
2009 May 09
1
[LLVMdev] Question on register class
Hello,
Given a TargetRegisterClass *RC, I was wondering if there is a way to
find out what register class it is directly, instead of comparing it
against all the &mytarget::Class1, &mytarget::Class2 etc. This goes
back to my original intention of having special query functions for a
subset of register classes. Suppose I wanted vector register classes
(more than one, say 2-elements and
2023 Aug 18
1
Host key verification (known_hosts) with ProxyJump/ProxyCommand
On Fri, 18 Aug 2023 at 15:25, Stuart Longland VK4MSL <me at vk4msl.com> wrote:
[...]
> The crux of this is that we cannot assume the local IPv4 address is
> unique, since it's not (and in many cases, not even static).
If the IP address is not significant, you can tell ssh to not record
them ("CheckHostIP no").
[...]
> Host mytarget
> Hostname 172.16.1.2
2015 Oct 15
3
what can cause a "CPU table is not sorted" assertion
I'm trying to create a simplified 2 slot VLIW from an OR1K. The codebase
I'm working with is here <https://github.com/openrisc/llvm-or1k>. I've
created an initial MyTargetSchedule.td
def MyTargetModel : SchedMachineModel {
// HW can decode 2 instructions per cycle.
let IssueWidth = 2;
let LoadLatency = 4;
let MispredictPenalty = 16;
// This flag is set to allow the
2010 Dec 15
1
[LLVMdev] Optimization passes break machine instructions on new backend
It just occured to me that perhaps what happens is that since the
cmp-instruction is initially followed by the pseudo-instruction - which
doesn't have Uses = [CFR] - that it's marked dead initially, and never
changed back when the SKIPCOND is inserted by the custom emitter? But I feel
that this would happen in e.g. MSP430 too then...
On Wed, Dec 15, 2010 at 10:14 AM, Anton Korobeynikov
2009 Mar 30
1
[LLVMdev] Dear Evan Chang, Re: help: about how to use tblgen to constraint operand.
I try to define a register class
def GPR64 : RegisterClass<"mytarget", [i64], 64, [T0, T1.....]
to simulate even/odd pair of GPR32 register.
Actually, I just use GPR64 as a temporary register.
My CPU just support i32 Integer type directly.
I use FDR to save f64.
def FDR : RegisterClass<"mytarget", [f64], 64,[FD0, FD1, ....]
When I move f64 to even/odd pair register, I