Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] Emitting LLVM IR for control flow"
2012 Nov 10
1
help with for loop to test for a condition in a vector
I want my for loop to test for the presence of a term in a vector and return
a value to a new vector. I'm not writing it correctly though. Here's what I
have...
> testfor = letters[1:5]
> x = c("a", "b", "e", "f", "g")
> result = rep(NA, length(testfor))
>
> for (i in testfor){
+ v = any(x == testfor[i])
+ result[i] = v
2013 Mar 11
0
[LLVMdev] How to unroll reduction loop with caching accumulator on register?
I tried to manually assign each of 3 arrays a unique TBAA node. But it does
not seem to help: alias analysis still considers arrays as may-alias, which
most likely prevents the desired optimization. Below is the sample code
with TBAA metadata inserted. Could you please suggest what might be wrong
with it?
Many thanks,
- D.
marcusmae at M17xR4:~/forge/llvm$ opt -time-passes -enable-tbaa -tbaa
2010 May 28
0
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
The thread here should help.
http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-May/031624.html
On May 28, 2010, at 6:35 AMPDT, Curtis Faith wrote:
> I have some LLVM IR after the optimization passes defined in createStandardModulePasses with the optimization level set to 3. It contains what appears to me to be an easily optimizable branch statement.
>
> In particular, note in the code
2010 May 28
4
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
I have some LLVM IR after the optimization passes defined in createStandardModulePasses with the optimization level set to 3. It contains what appears to me to be an easily optimizable branch statement.
In particular, note in the code below that at the end of the "loop" BasicBlock that there is a conditional branch where in the false case, it branches to the label
2004 Sep 13
0
System preferences
Dear Mr./Mrs.,
After installing and configurating Samba Sharing on my ibook G3, I
tried
to start up but after pushing the 'start button', System preferences
just quits after about one minute, with the appearance of a message
"Syst. Prefs. has unexpectadly stopped!"
and the option of sending a bug report.
The shared volume only then appears in the 'network
2004 Apr 21
0
[LLVMdev] x86 cogen quality
On Wed, Apr 21, 2004 at 11:01:48AM +0200, Finn S Andersen wrote:
> For some of the benchmarks the linear scan regalloc
> works. When it does, results are in the x1.0 - 1.5
> range. Unfortunately, the linear scan allocator breaks
> on most of my code.
Is there a chance you can try cvs? I would be interested to
get a simplified test case where the allocator breaks. A lot of
2004 Apr 22
2
[LLVMdev] x86 cogen quality
Alkis Evlogimenos wrote:
>On Wed, Apr 21, 2004 at 11:01:48AM +0200, Finn S Andersen wrote:
>
>
>>For some of the benchmarks the linear scan regalloc
>>works. When it does, results are in the x1.0 - 1.5
>>range. Unfortunately, the linear scan allocator breaks
>>on most of my code.
>>
>>
>
>Is there a chance you can try cvs? I would be
2004 Apr 21
4
[LLVMdev] x86 cogen quality
Hi, I have a question about x86 code quality.
I have run a few benchmarks and compared the
running time of executables created by LLVM to
executables created by gcc.
It appears that code generated by LLVM is x1.5 - x3
times slower than code generated by gcc, for the x86
For some of the benchmarks the linear scan regalloc
works. When it does, results are in the x1.0 - 1.5
range. Unfortunately,
2017 Jan 28
3
[RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension
Dear all,
This RFC proposes three new LLVM IR instructions to express high-level
parallel constructs in a simple, low-level fashion. For this first stage
we prepared two commits that add the proposed instructions and a pass to
lower them to obtain sequential IR. Both patches have be uploaded for
review [1, 2]. The latter patch is very simple and the former consists
of almost only mechanical
2013 Mar 11
2
[LLVMdev] How to unroll reduction loop with caching accumulator on register?
Dear all,
Attached notunrolled.ll is a module containing reduction kernel. What I'm
trying to do is to unroll it in such way, that partial reduction on
unrolled iterations would be performed on register, and then stored to
memory only once. Currently llvm's unroller together with all standard
optimizations produce code, which stores value to memory after every
unrolled iteration, which is
2011 Nov 18
1
Polycom Phantom Ringing
I have a Polycom Soundpoint IP335.
There are no inbound routes set to the phones yet.
However, the phones are getting phantom rings.
What is the legitimacy of these calls?
Is there something I need to block to stop it?
I believe its people trying to hack the phones/phone system but I cannot find where I read that before.
Thanks,
--E
-------------- next part
2017 Mar 08
3
(no subject)
> On Mar 8, 2017, at 10:55 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>
>>
>> On Mar 8, 2017, at 5:36 AM, Johannes Doerfert <doerfert at cs.uni-saarland.de> wrote:
>>
>> <mehdi.amini at apple.com>,
>> Bcc:
>> Subject: Re: [llvm-dev] [RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension
>> Reply-To:
>>
2011 Feb 08
1
[LLVMdev] Question about linker error
Hello all,
When extending the tutorial to support global variables I'm getting
the following linker error:
glob.o:glob.cpp:(.text+0x12241): undefined reference to `vtable for
GlobalExprAST'
collect2: ld returned 1 exit status
GlobalExprAST class is:
/// GlobalExprAST - Expression class for globals
class GlobalExprAST : public ExprAST {
std::string Name;
ExprAST *Init;
public:
2017 Mar 08
3
(no subject)
A quick update, we have been looking through all LLVM passes to identify the impact of "IR-region annotation", and interaction issues with the rest of LoopOpt and scalarOpt, e.g. interaction with vectorization when you have schedule(simd:guided: 64). What are the common properties for optimizer to know on IR-region annotations. We have our implementation working from O0, O1, O2 to O3.
2017 Mar 08
2
(no subject)
On 03/08/2017 12:44 PM, Johannes Doerfert wrote:
> I don't know who pointed it out first but Mehdi made me aware of it at
> CGO. I try to explain it shortly.
>
> Given the following situation (in pseudo code):
>
> alloc A[100];
> parallel_for(i = 0; i < 100; i++)
> A[i] = f(i);
>
> acc = 1;
> for(i = 0; i < 100; i++)
> acc = acc *
2017 Mar 08
5
(no subject)
<mehdi.amini at apple.com>,
Bcc:
Subject: Re: [llvm-dev] [RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension
Reply-To:
In-Reply-To: <20170224221713.GA931 at arch-linux-jd.home>
Ping.
PS.
Are there actually people interested in this?
We will continue working anyway but it might not make sense to put it
on reviews and announce it on the ML if nobody cares.
On 02/24,
2017 Mar 08
2
(no subject)
The IR-region annotation we proposed is as below, there is no @llvm.parallel.for.iterator()..... There is no change to loop CFG.
alloc A[100];
%t = call token @llvm.region.entry()["parallel.for"()]
for(i = 0; i < 100; i++) {
a[i] = f(i);
}
@llvm.region.exit(%t)() ["end.parallel.for"()]
Xinmin
-----Original Message-----
From: Johannes Doerfert
2011 Feb 13
3
[LLVMdev] conversion from 'const llvm::Value*' to 'llvm::Constant*'
Oh, I thought that after "codegening" cos(0) would get me double 1.0
(assigment is working for anything like: global a = 1/3 + 2 /3 for
example) What would be the best way to make assigments involving
functions, like global a = cos(0);
without getting the assertion arising from InitVal =
cast<Constant>(Init->Codegen()); ?
I made some changes and now my code basically works,
2017 Mar 08
2
[RFC][PIR] Parallel LLVM IR -- Stage 0 --
> On Mar 8, 2017, at 11:50 AM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>
> On 03/08/2017 01:24 PM, Tian, Xinmin wrote:
>> I assume the referring case is something like below, right?
>>
>> #pragma omp parallel num_threads(n)
>> {
>> #pragma omp critical
>> {
>> x = x + 1;
>> }
>> }
2017 Mar 08
4
(no subject)
".... the problem Mehdi pointed out regarding the missed initializations of array elements, did you comment on that one yet?"
What is the initializations of array elements question? I don't remember this question. Please refresh my memory. Thanks.
I thought Mehdi's question is more about what are attributes needed for these IR-annotation for other LLVM pass to understand and