similar to: [LLVMdev] MachineBasicBlock insertion and use/def list update

Hi all, I am really stumped on a problem for long. I could not figure out why. That is why i am here. OK, here is the problem: I tried to insert a MachineBasicBlock into a function. Here is the code snippet: // insert a machine basic block with the error_label into MF and before I // Pred is the predecessor of the block to be inserted // the new basic block is inserted right before I void

I'm attempting to add an error handler to functions with a custom calling convention. This error is checked upon function entry, before any code is run (specifically, I cannot allow any stack operations). Because of this, I figured a good place to do this code insertion is in EmitPrologue. I also, at this time, create the block that handles the error case. // create a new block for

On 09/17/2013 03:52 PM, Owen Anderson wrote: > +the list again > On Sep 17, 2013, at 3:48 PM, reed kotler <rkotler at mips.com> wrote: > >> On 09/17/2013 03:46 PM, Owen Anderson wrote: >>> On Sep 17, 2013, at 3:08 PM, reed kotler <rkotler at mips.com> wrote: >>> >>>> Is there any way, except for using bundles, to force two instructions to be

On 09/17/2013 04:51 PM, Micah Villmow wrote: > Reed, > Couldn't you also use instruction scheduling classes and specify that the second instruction has a bypass from the first instruction? The scheduler should always schedule them together in that case. > > Micah > I'm not sure exactly what you mean. Can you point me to an example of that? TIA. Reed >>

Reed, Couldn't you also use instruction scheduling classes and specify that the second instruction has a bypass from the first instruction? The scheduler should always schedule them together in that case. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of reed kotler > Sent: Tuesday, September 17, 2013

That doesn't actually give you a guarantee that they won't be split up. Phases other than the scheduler may insert instructions in the middle of block (constant island pass, for example). Pseudo-instructions are the canonical answer to that problem. --Owen On Sep 17, 2013, at 11:09 PM, Micah Villmow <micah.villmow at smachines.com> wrote: > I used the A9 schedule as an

I used the A9 schedule as an example: http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td The documentation could use more clarity, but this is how I was able to do it to always get two specific instructions to be scheduled together. ________________________________________ From: reed kotler [rkotler at mips.com] Sent: Tuesday, September 17, 2013 8:54 PM To: Micah Villmow

I have a MachineFunctionPass plugged into llc during LLVMTargetMachine::addPreRegAlloc. In this Pass I need to extend calls (i. e. CALL32m, CALL32r) iff they call function within the program. CALL32m has, I think, ten different possibilities for the four operands giving the target address. At the moment I have excluded calls that give the displacement as GlobalAddress or JumpTableIndex

+the list again On Sep 17, 2013, at 3:48 PM, reed kotler <rkotler at mips.com> wrote: > On 09/17/2013 03:46 PM, Owen Anderson wrote: >> On Sep 17, 2013, at 3:08 PM, reed kotler <rkotler at mips.com> wrote: >> >>> Is there any way, except for using bundles, to force two instructions to be sequentially executed? >> What level of codegen are you working at?

Hello llvm-dev, I'm currently integrating an experimental instruction scheduler into LLVM and have come upon a point of confusion regarding WAW dependencies. I apologize in advance for the unnecessarily convoluted example, but it's one solid case which fails on my scheduler and where I can get LLVM to produce a graph that shows my question clearly. I have a small piece of code like this

Since the getelementptrs were implicitly generated by the CreateStore/Load I'm not sure how to get access to them. So I hacked the assignment to be done thrice: once using a manual decomposition into two GEPs and stores, once using the "big" CreateStore, once via the setGlobal function, printing addresses and memory contents at each point to the degree that I have access to them.

Dear guys, I am in need of more of your help. I'm implementing a register allocator, and I am having problems to make it produce correct code. Consider this program here: int main(int argc, char ** argv) { int i, j, sum; i = argv[0][0]; j = argv[0][1]; sum = (i + j) * j; printf("Sum = %d\n", sum); } that maps to this llvm bytecode: entry (0xa785590, LLVM

On Mon, Jun 5, 2017 at 1:34 PM, Nikodemus Siivola < nikodemus at random-state.net> wrote: > Uh. Turns out that if I hide the pointer to @foo from LLVM by passing it > through an opaque identity function ... then everything works fine. > > Is this a bug in LLVM or is there some magic involving globals I'm > misunderstanding? > This looks like a bug in the handling of

I'm having an issue with the Stubs used by the JIT Compiler. I'm not sure if it's a bug or if I'm doing something incorrectly. I've got a long complicated function with the following basic blocks at the end of it (The complete .ll file is attached): falseBlock: ; preds = %__exp.exit340 ret int 617 codeRepl: ; preds = %__exp.exit340

Hi, while writing my register allocator, I have come across a case which confuses me because the llvm definition cannot be mapped to machine code. For instance I come across (1) and I reduce it to (2). However a copy instruction cannot move from EDX to CX. What mechanics in LLVM will tell me that I cannot make this move during register allocation, or how can I tell from (1) that I cannot execute

Hi, I'm currently trying to modify LLVM to include runtime checks into X86 binaries. I've looked into some of the possibilities during the phases happening in LLVM and have the impression that inserting runtime checks during selection would be great, since lots of optimizations are already done and I can work directly with X86 instructions. I've read through the documentation for

Hello, I just wrote the code like this: BuildMI(BB, NM::CALL, 1) .addExternalSymbol(("_lvksda_control_marker_" + lexical_cast<string>(bb)).c_str()); and got some unexpected string in the assembler output. The problem is that when external symbol is added to MachineInstruction, MachineOperand is created with the char*

That's useful to know that the static compilation code path works. Furthermore, as expected from that: 52: c7 05 04 00 00 00 d5 00 00 00 movl $213, 4 00000054: IMAGE_REL_I386_DIR32 _foo It looks like the offset `4` of the second field of your struct is correct in the object file, so this does seem to be a problem in the JIT-specific linking/loading.

On Fri, 15 Apr 2005, Vladimir Prus wrote: > Hello, > I just wrote the code like this: > > BuildMI(BB, NM::CALL, 1) > .addExternalSymbol(("_lvksda_control_marker_" > + lexical_cast<string>(bb)).c_str()); > > and got some unexpected string in the assembler output. The problem is > that when external

Hi all, I am writing a pass subclassing the MachineFunctionPass and doing the instrumentation in runOnMachineFunction(). But I do not know how to insert a function call. In my work, I write a special function for a program to be compiled and I need to insert this function after certain instructions whose destination register is esp. In X86InstrInfo.cpp, there are two kinds of call may be