similar to: [LLVMdev] [LLVMDev] How do I add a branch to a MachineInstr?

Comments below. On Apr 15, 2008, at 4:24 AM, Nicolas Geoffray wrote: > OK, here's a new patch that adds the infrastructure and the > implementation for X86, ARM and PPC of GetInstSize and > GetFunctionSize. Both functions are virtual functions defined in > TargetInstrInfo.h. > > For X86, I moved some commodity functions from X86CodeEmitter to > X86InstrInfo. >

Hi all, I am still stumped on the same bug. Did anyone try to insert MachineBasicBlock into a MachineFunction? Any advice will be appreciated. Thanks a lot in advance. ~Bin ---------------------------------------------------------------------------------------------------------------------------- Thanks a lot Jeff. I changed the setNumber function call to

Also note: there may be multiple MachineBasicBlock's for a single BasicBlock. - David M On Fri, Oct 15, 2010 at 4:59 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > I don't think you can. > > The BasicBlock is a member of MachineBasicBlock. It is not inherited, > so it cannot be cast. The number of the MachineBasicBlock is not the > same as any BasicBlock values.

Hi all, I am really stumped on a problem for long. I could not figure out why. That is why i am here. OK, here is the problem: I tried to insert a MachineBasicBlock into a function. Here is the code snippet: // insert a machine basic block with the error_label into MF and before I // Pred is the predecessor of the block to be inserted // the new basic block is inserted right before I void

I forgot to CC the forum. I found what was happening. The BranchFolder documentation says: // Note that this pass must be run after register allocation, it cannot handle // SSA form. > On Wed, Oct 6, 2010 at 8:05 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: >> No, I just noticed that blocks were separated. >> >> >> On Wed, Oct 6, 2010 at 8:04 PM, Bob Wilson

It would go something like like the code below. The goal would be to turn the basic blocks which the graph looks like "...->x->y->..." where the instructions of x and y could live in the same basic block without a jump or fall through in between. bool runOnMachineFunction(MachineFunction &mf) { BitVector seen( mf.size() ); for( unsigned i = 0, e = mf.size();

Aye, between all current register allocators the 'AU.addRequiredID(PHIEliminationID);' will cause phi's to be eliminated to copies, but this misses the point of my question. What I am asking, is how does stack know that the value of the variable which the resulting value of the phi is currently allocated at. For instance take the instruction: Machine Basic Block (mbb) 12 reg16666 =

Hi, I'm still having problems implementing my custom inserter in the X86 backend. I found a solution to my last problem (http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-October/078296.html), by using a virtual register. The binary works when it's compiled in -O0, but not in -O1,-O2,... I really can't figure what I'm doing wrong... Any idea? Here is the code of my custom

Hi, I'm having trouble using virtual register in the X86 backend. I implemented a new intrinsic and I use a custom inserter. The goal of the intrinsic is to set the content of the stack to zero at the end of each function. Here is my code: MachineBasicBlock * X86TargetLowering::EmitBURNSTACKWithCustomInserter( MachineInstr *MI, MachineBasicBlock

I don't think you can. The BasicBlock is a member of MachineBasicBlock. It is not inherited, so it cannot be cast. The number of the MachineBasicBlock is not the same as any BasicBlock values. So MachineFunction::getMachineBasicBlock( BasicBlock::{get the number} ) cannot work. I do not see much in the basic block which can identify it. So you can search for it. typedef struct findBlock {

Hi, Thx for your help... Here is the IR code: ; ModuleID = 'foo_bar.c' target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [6 x i8] c"MAIN\0A\00", align 1 ; Function Attrs: nounwind uwtable define i32 @main(i32 %argc, i8** %argv) #0 { entry: %retval = alloca i32,

Hi I am developing some machine function pass. I want to split MachineBasicBlcok when I find some specific machine instruction. But I don't insert or delete any machine instruction. I just "simply" , "purely" split the MachineBasicBlcok. (So, I stole the idea from ARM64BranchRelaxation::splitBlockBeforeInstr.) This is my code : // I would pass call instruction to

I ended up settling on a scheme which I'm not completely happy with but it's the best I can see to do. const MCInstrDesc& AddiuSpImm(int64_t Imm) const; and then if (isInt<16>(-Remainder)) BuildMI(MBB, I, DL, AddiuSpImm(-Remainder)).addImm(-Remainder); So the AddiuSpImm choses which instruction description to use depending on the immediate value and then

There is nothing that currently handles this properly, as far as I know. If you have a phi c = phi(a, b) where a, b and c are all assigned distinct stack slots, then copies must be inserted in the predecessor. If registers have already been allocated, then this memory copy might require a temporary register (unless you're on an architecture like x86 that lets you do memory-to-memory copies

Hi, In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to compute the MBB2IdxMap, by remembering for each MBB its start and end instruction numbers: unsigned MIIndex = 0; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { unsigned StartIdx = MIIndex; for (MachineBasicBlock::iterator I = MBB->begin(), E =

Hi I'm seeing something probably related to this. I'm getting an assert from the lower_bound in LiveIntervals::findLiveinMBBs (from a checking std:: VS2005 implementation). Idx2MBBMap has two elements in it, both of which have a .first of 0. (I believe because of an empty MBB in the function below, so StartIndex doesn't advance). scott On Wed, Apr 16, 2008 at 2:52 AM, Roman

> So what addIntervalsToSpills returns are new intervals to allocate with > infinite weights, right? > And I need not to allocate the old interval. Should hasStackSlot return true > on its register then? > I am not very sure about addIntervalsToSpill, but, for all the registers created to replace a spilled registers, they must have a stack slot assigned to them. I am sending you my

For spilling, I plan to use the Hack-Braun generalization of the furthest-first heuristic for SSA: http://pp.info.uni-karlsruhe.de/uploads/publikationen/braun09cc.pdf For coloring, there are a few different approaches you can take, e.g. dominator tree scan, puzzle-solving, or a modified graph coloring / coalescing heuristic like IRC. The best quality for the least amount of implementation effort

Can you file a bug so I don't forget? I'm a little occupied right now. But I'll take care of this soon. Evan On Apr 16, 2008, at 10:52 AM, Scott Graham wrote: > Hi > > I'm seeing something probably related to this. I'm getting an assert > from the lower_bound in LiveIntervals::findLiveinMBBs (from a checking > std:: VS2005 implementation). Idx2MBBMap has two

Hi, I'm implementing __builtin_setjmp and __builtin_longjmp for Sparc 32 bit processors (64 bit later, time allowing). I'm basing the code on the PowerPC version, which itself is based on the X86 version. This code is very nearly working, and I've had it working for -O0 optimisation (with a slightly different version to that below), so I know it's close. However, the PowerPC