similar to: [LLVMdev] Values have no names when generating *.ll files in clang and llvm 2.8 ?

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Values have no names when generating *.ll files in clang and llvm 2.8 ?"

2010 Oct 13
0
[LLVMdev] Values have no names when generating *.ll files in clang and llvm 2.8 ?
Hi Alexandra, > I upgraded to llvm 2.8 and when I generate *.ll files from C/C++ with > clang -S -emit-llvm I obtain a *.ll file in which instructions and > basicblocks have no names. > I tried as well compiling with the -g option, but no names were given. with dragonegg using -fverbose-asm causes names to be generated in the IR. Maybe clang could do this to? Ciao, Duncan.
2014 May 22
2
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
On May 22, 2014, at 3:51 PM, Chandler Carruth <chandlerc at google.com> wrote: > > On Thu, May 22, 2014 at 4:42 PM, Louis Gerbarg <lgg at apple.com> wrote: > The problem that the above transform is technically illegal because “When indexing into a (optionally packed) structure, only i32 integer constants are allowed (when using a vector of indices they must all be the same
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
Hello, I want to compile a LLVM file into an executable running on ARM platform. I use LLVM 2.0 with the following command lines: llvm-as -f -o test.bc test.ll llc -march=arm -mcpu=arm1136j-s -mattr=+v6 -f -o test.s test.bc arm-linux-gnu-as -mcpu=arm1136j-s test.s With the last command, I obtain the following error: rd and rm should be different in mul The bad instruction is
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
Hi Mikael, You are obtaining warning, not an error, right? The most arm cores, including arm1136, can execute mul with rd = rm. So, you can ignore this warning. Lauro 2007/6/12, Peltier, Mikael <m-peltier at ti.com>: > > > > > Hello, > > > > I want to compile a LLVM file into an executable running on ARM platform. > > I use LLVM 2.0 with the following
2010 Oct 13
2
[LLVMdev] Values have no names when generating *.ll files in clang and llvm 2.8 ?
On Oct 13, 2010, at 12:16 PM, Duncan Sands wrote: > Hi Alexandra, > >> I upgraded to llvm 2.8 and when I generate *.ll files from C/C++ with >> clang -S -emit-llvm I obtain a *.ll file in which instructions and >> basicblocks have no names. >> I tried as well compiling with the -g option, but no names were given. > > with dragonegg using -fverbose-asm causes
2014 May 22
4
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
Recently I posted a patch to migrate certain GEPs between basic blocks in cases where doing so would improve the ability of instcombine to merge into more complicated addressing mode (r209049 and r209065). After some build to failures it was rolled back. I now have a patch that no longer causes the regressions I was seeing, but it also no longer can optimize the case I was trying to optimize. As
2007 Jul 31
3
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
Hi, I was talking with aKor in #llvm how we could implement custom operation support for our ASIP architecture. We came into solution that the best way would be to write new custom operation intrinsic and optimization pass for raising certain type of function calls to those intrinsics (similar to raising mallocs). Basically our custom operation are like calls, with operand name and multiple
2007 Aug 01
0
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
On Tue, 31 Jul 2007, [ISO-8859-1] Mikael Lepist� wrote: > I was talking with aKor in #llvm how we could implement custom operation > support for our ASIP architecture. We came into solution that the best > way would be to write new custom operation intrinsic and optimization > pass for raising certain type of function calls to those intrinsics > (similar to raising mallocs). >
2007 Aug 01
1
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
> From: Mikael Lepist? <mikael.lepisto at tut.fi> > > Hi, Hi Mikael > I was talking with aKor in #llvm how we could implement custom operation > support for our ASIP architecture. We came into solution that the best > way would be to write new custom operation intrinsic and optimization > pass for raising certain type of function calls to those intrinsics > (similar
2013 Nov 08
3
[LLVMdev] Loads moving across barriers
Hi, For a long time we've been having a problem we've been working around in OpenCL where loads are moving across an intrinsic used for a barrier. Attached is the testcase, and the result of opt -S -basicaa -gvn on it. This example is essentially this: void foo(global float2* result, local float2* restrict data0, ...) { int id = get_local_id(0); // ... data0[id] = ...;
2014 May 23
2
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
----- Original Message ----- > From: "Chandler Carruth" <chandlerc at google.com> > To: "Louis Gerbarg" <lgg at apple.com> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Thursday, May 22, 2014 7:09:49 PM > Subject: Re: [LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer > > > > >
2008 Jan 12
1
[LLVMdev] Labels
I'm attempting to modify a parser generator to emit LLVM code instead of C. So far the experience has been trivial, but I am now running into an error regarding labels that I can't seem to solve. Situation 1: A label is used immediately after a void function call (l6 in this case): <snip> %tmp26 = load i32* @yybegin, align 4 %tmp27 = load i32* @yyend, align 4 call void
2011 Mar 01
3
[LLVMdev] metadata to inform the optimizers that some code should stay unchanged
Hello LLVM, I am working on some passes that perform code transformations. Since I am interested in performance, I apply the O3 passes, right after my pass. However, the optimization passes modify the code inserted by my pass in an undesirable way. As far I know, there is no way to prevent the optimizers from optimizing some regions of code. So what I intend to do is to attach metadata to the
2010 Mar 05
3
[LLVMdev] How to .. jump from inline asm to a BasicBlock?
Hello, I have a problem trying to create an inline asm that checks one condition and based on the result of the condition it should jump to one BasicBlock or to another. My question is: is this possible in LLVM, from the inline asm to jump out, to the LLVM code, and if it is, how can I pass the label to which the code should jump. I tried passing the address of the BasicBlocks, using
2018 Feb 03
2
Adding comments to 'MachineInstruction'
When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a comment that appears in the generated assembly with '-S -fverbose-asm'. There is a large set of 'add*' functions to attach additional information to the MI, but I don't see one for adding comments. Is there a method I can call to attach an arbitrary string
2008 Sep 03
2
[LLVMdev] Codegen/Register allocation question.
Hi LLVMers, I have finally sorted out licensing issues and found some time, so I'm trying to port my PBQP register allocator to 2.4 in order to contribute it (if you want it). I've run into a bug that has me confused though. I'm currently failing the following assertion: llc: VirtRegMap.cpp:1733: void<unnamed>::LocalSpiller::RewriteMBB(llvm::MachineBasicBlock&,
2010 May 10
2
[LLVMdev] Separate loop condition and loop body
Hi, Is it possible to get the list of BasicBlocks building the condition of a loop and the list of BasicBlocks that form the body? My first approach was to iterate over the list of all Basicblocks of a loop and separate the header as the condition and the remaining as the body of the loop. However, this is not correct for instance in the case of a while loop in the form: while( A & B) do {
2012 Apr 26
0
[LLVMdev] PHI Insertion
I think I may have asked this question before but I'm not sure I articulated exactly what I was trying to do. So, I am redirecting a block such that: Instruction does not dominate all uses! %tmp25 = load i32* %nBits, align 4, !tbaa !3 %add110 = add i32 %tmp25, 7 Is there a pass/util/function that can be used to insert PHI nodes for this issue? It would seem the SSAUpdater would be
2017 Feb 03
3
RFC: Add a way to interleave source code in assembler output
Dear llvm/clang community, I'm interested in adding a way to emit source code interleaved in the output of the assembler. - Introduction A feature that several compilers have and clang/llvm is missing is the possibility of interleaving source code in the assembler output (e.g. when using -S). This feature is useful for a number of reasons. For those users who are concerned with the quality
2008 Sep 04
0
[LLVMdev] Codegen/Register allocation question.
On Sep 3, 2008, at 5:58 AM, Lang Hames wrote: > Hi LLVMers, > > I have finally sorted out licensing issues and found some time, so I'm > trying to port my PBQP register allocator to 2.4 in order to Nice! We would definitely welcome your contribution. > > contribute it (if you want it). I've run into a bug that has me > confused though. > > I'm currently