similar to: [LLVMdev] register constraints

On Thu, 13 Dec 2018 at 21:41, Friedman, Eli <efriedma at codeaurora.org> wrote: > > On 12/13/2018 6:25 AM, Alex Bradbury wrote: > > There's also likely to be cases where you want to calculate the demanded bits > > in order to determine if e.g. a W-suffixed instruction can be selected for > > `(somoeop (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))`. This is easy to match

As previously discussed in an RFC <http://lists.llvm.org/pipermail/llvm-dev/2018-October/126690.html>, the RISC-V backend has i64 as the only legal integer type for the RV64 target. Thanks to variable-sized register class support, this means there is no need for duplication of either patterns or instruction definitions for RV32 and RV64. It's worth noting that RV64I is a different base

On Jul 21, 2009, at 11:14 PM, Eli Friedman wrote: > Testcase (compile with clang >= r76726): > #include <emmintrin.h> > __m128i a(__m128 a, __m128 b) { return a==a & b==b; } > > CodeGen ends up scalarizing the comparison, which is really bad, and > AFAIK different from what we did before vsetcc was removed. The ideal > code is a single cmpordps, although I

You are welcome. I changed the pattern, the same old error pop up again, crash in the same place. Type set is empty for each HW mode: possible type contradiction in the pattern below (use -print-records with llvm-tblgen to see all expanded records). vtInt: &nbsp; (vt:{ *:[Other] }) UNREACHABLE executed at /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:824!

Hello, in some operations there is a ty2 type, for example in truncate. What is the most right way to get it ? I have seen some EVT types, but this is connected to DAG... and I don't believe that there is no easy way to get ty2 with one call function. -------------- next part -------------- An HTML attachment was scrubbed... URL:

Now that OpenSSL has received FIPS 140-2 certification, does anyone know if the work started a couple of years ago to allow OpenSSH to use OpenSSL in FIPS mode will be reactivated? Bill

I'm running FreeBSD 4.4, with Samba 2.2.2 freshly installed, with the FreeBSD Ports package to install files in correct places. I've a Win2k system tring to join the domain "FREESIDE" It will authenticate ok from the win2k command line. "net use x: \\crypton\homes /USER:FREESIDE\jerry" It seems to work ok during the first part of joining a domain, i.e. password

Hi, I have application, where I am reciving the RTP packets, which has OPUS payload. >From the RTP packets I got following information: (12 byes Header) tells about the version, payload time, time stamp, srsc, etc. The rest of the packet is OPUS payload (raw format), The TOC byte from OPUS payload tells its 20ms frame, even the time stamp different of 960 means 20 msec frame. Questions: 1)

Hi, We are now about halfway between the 3.4 and 3.5 releases, and I would like to start preparing for a 3.4.1 release. Here is my proposed release schedule: Mar 26 - April 9: Identify and backport additional bug fixes to the 3.4 branch. April 9 - April 18: Testing Phase April 18: 3.4.1 Release How you can help: - If you have any bug fixes you think should be included to 3.4.1, send me an

Hi John, John McCall wrote: >> On Nov 10, 2016, at 10:37 PM, Sanjoy Das<sanjoy at playingwithpointers.com> wrote: >> As a concrete example, say we have: >> >> i32 sum = x *nsw y >> i64 sum.sext = sext sum to i64 >> ... >> some use of sum.sext >> >> >> Pretending "x +nsw 1" does not sign-overflow, we can commute the sext

Sanjoy, My answer is that step 3, commuting the multiply with the sign-extends, is invalid, As this is what causes the `udiv` to fault. I think it is invalid with or without the “freeze”, why do you think step 3, the commute, without the “freeze" is valid ? Also, do you think you can come up with an example that does not depend on signed overflow being “undefined” ? Peter

Hi, I have a question about the "sext..to" instruction. In the document, I found two examples: %x = sext i8 -1 to i16 It means: i8 -1 = 1111 1111 --> 1111 1111 1111 1111 = i16 how can it determinate, that the i16 value %x positive is (65535)? And the second example: %y = sext i1 true to i32 1 --> 1111 1111 1111 1111 1111 1111 1111 1111 In this example, %y is -1 I'm not sure

Thanks Sanjoy. > To be pedantic, "var[i<<1]" is not an add recurrence, but "&var[i << > 1]" is an add recurrence. I'll assume that's that you meant. Yes, I meant the same. > I think that is because in C, multiplication is nsw but left shift is > not and so "i << 1" can legitimately sign-overflow but i * 2 cannot >

Hi all, There might be a simple error in the LLVM reference manual. The example for sext instruction: %X = sext i8 -1 to i16 ; yields i16 :65535 %X should yield i16: -1, as opposed to 65535. Here is the simple patch (also attached): Index: docs/LangRef.rst =================================================================== --- docs/LangRef.rst (revision 184496) +++ docs/LangRef.rst

Hi Alexandre, On Wed, Oct 19, 2016 at 6:27 PM, Alexandre Isoard <alexandre.isoard at gmail.com> wrote: > Really interesting read. I am perplexed now, and am not even sure what is > the meaning of undef anymore. Welcome aboard. :) > Example (unrelated to your blog post, but still weird): > %x = sext i1 undef to i2 > > I understand that I can replace it by either of: >

Hi Sanjoy, Thank you for looking into this! Yes, your patch does fix my larger test case too. My algorithm gets double performance improvement with the patch, as the loop now has a smaller instruction set and succeeds to unroll w/o any extra #pragma's. I also ran the LLVM tests against the patch. There are 6 new failures: Analysis/LoopAccessAnalysis/number-of-memchecks.ll

In https://reviews.llvm.org/D68103 the InstCombine learned that shift-by-sext is simply a shift-by-zext. But the transform is limited to single-use sext. We can quite trivially get a case where there are two shifts by the same sext: https://godbolt.org/z/j6mO3t <- We should handle those cases. In https://reviews.llvm.org/D68103#1686130 Sanjay Patel notes that this sext is intrusive for

Since most add/sub operations compiled from C have the nsw attribute, we cannot simply restrict movement of these instructions. Sure, we could drop nsw when moving these instructions, but there are still many other problems left. Please read more about the topic here: https://blog.regehr.org/archives/1496 For example, doing loop unswitching, followed by inline (just to illustrate that the

Hi Nick, Thanks for looking into it. I have tried that as well but it didn't worked. "AddExpr->getOperand(0))" node is: " (4 * (sext i32 {2,+,2}<%for.body4> to i64))<nsw>" When I cast this to "SCEVAddRecExpr" it returns NULL. Regards, Ashutosh -----Original Message----- From: Nick Lewycky [mailto:nicholas at mxc.ca] Sent: Thursday, March 19,

Yes, I can get "SCEVAddRecExpr" from operands of "(sext i32 {2,+,2}<%for.body4> to i64)". So whenever SCEV cast to "SCEVAddRecExpr" fails, we have drill down for such patterns ? Is that the right way ? Regards, Ashutosh -----Original Message----- From: Nick Lewycky [mailto:nicholas at mxc.ca] Sent: Thursday, March 19, 2015 1:02 PM To: Nema, Ashutosh Cc: