similar to: [LLVMdev] [LLVMDev] Coalescing Registers

The register coalescer treats virtual super register classes -- a sequential register range composed of multiple hardware registers -- as a register with sub registers. When making coalescing decisions it thinks that the virtual super reg interferes with sub reg instances, even though in reality they shouldn't conflict. That is, they are individual registers and would be better compared as

On May 31, 2013, at 4:07 PM, Joe Matarazzo <joe.matarazzo at gmail.com> wrote: > The register coalescer treats virtual super register classes -- a sequential register range composed of multiple hardware registers -- as a register with sub registers. When making coalescing decisions it thinks that the virtual super reg interferes with sub reg instances, even though in reality they

Hello. Could you please tell me how can I optimize with the back end (llc) the following piece of assembly code generated by llc: // NOTE: my processor accepts loops in the form of REPEAT(num_times)..END_REPEAT R0 = ... REPEAT(256) R5 = R0; // basically unnecessary reg. copy REPEAT(256) R10 = LS[R4]; R2 = LS[R5]; R4 =

On Wednesday 20 February 2008 07:00:28 pm Evan Cheng wrote: > > In other words, after coalescing, should it be the case that > > subregister > > intervals contain at least all of the range information that was > > contained > > in any eliminated intervals when those eliminated intervals were > > coalesced > > to the subregister's superregister? >

On Feb 20, 2008, at 12:25 PM, David Greene wrote: > On Wednesday 20 February 2008 14:14, David Greene wrote: > >> I discovered this through an assert I put into some of my own >> code. I want >> to know if that assert is bogus or if there's a bug here. > > A little more information: the assert checks that after coalescing > two nodes, > all subregister

Dear Dave, Evan, thank you for answering. What I did was to remove the implementation of most of the methods of SimpleRegisterCoalescing and put them in a single class (RegisterCoalescer_Impl) that is not an analysis. Any class that wants these methods, can extend this class privately, or can use a reference to an RegisterCoalescer_Impl object. I wish it would be possible to go even

> > You can look at the output of -debug-only=regcoalescing to see what is > going on. > > This is the debug output i've got, some information is a bit cryptic for me so next is what i understood: ********** SIMPLE REGISTER COALESCING ********** ********** Function: foo ********** JOINING INTERVALS *********** entry: 16L %vreg0<def> = COPY %R25R24<kill>;

On Monday 17 December 2007 14:06, Fernando Magno Quintao Pereira wrote: > Dear Dave, Evan, thank you for answering. > > What I did was to remove the implementation of most of the methods of > SimpleRegisterCoalescing and put them in a single class > (RegisterCoalescer_Impl) that is not an analysis. Any class that wants > these methods, can extend this class privately, or can

On Feb 20, 2008, at 7:36 PM, David A. Greene wrote: > On Wednesday 20 February 2008 07:00:28 pm Evan Cheng wrote: > >>> In other words, after coalescing, should it be the case that >>> subregister >>> intervals contain at least all of the range information that was >>> contained >>> in any eliminated intervals when those eliminated intervals were

I have a question about what is going on at line 754 of SimpleRegisterCoalescing.cpp. The comment says we are updating the live intervals for subregisters. This happens when we coalesce to a physical register. Now, I read that as, "merge in the range information from the eliminated live interval to the subregister live interval," but that appears to not be what happens. In my case,

Hi, I am seeing cases of poorly coalesced IV updates on SystemZ: In the final IR, it is obvious that %R4D<def> = LA %R2D<kill>, 4, %noreg // R4 = R2 + 4 %R2D<def> = LGR %R4D<kill> // R2 = R4 could be optimized to -> %R2D<def> = LA %R2D<kill>, 4, %noreg // R2 = R2 + 4 The reason this wasn't coalesced, is

I've hit a bug in a refactored version of coalescing and I'm trying to understand what is going on. In particular, I'm curious about this line in SimpleRegisterCoalescing.cpp: 00710 LHSValsDefinedFromRHS[VNI] = RHS.getLiveRangeContaining(VNI->def-1)->valno; Why VNI->def-1? The bug I'm seeing is that RHS returns a NULL LiveRange because it doesn't contain

Dear guys, I want to coalesce some copies, and I would like to know if there is any method that I can call, like JoinCopy from the old (LLVM 1.9) LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM 2.1), but I do not want to call this analysis, as I have my own. basically, I can determine that two virtuals do not overlap, and I know that it is safe to join them. In

On Friday 09 January 2009 03:36, Roman Levenstein wrote: > Hi, > > I'm implementing some variations of graph-coloring register allocators for > LLVM. Many of them perform their phases (e.g. coalescing, graph > simplification, spilling, color selection) in an iterative way. Since > LLVM provides an implementation of the coalescing in the > SimpleRegisterCoalescing class

On Dec 15, 2007, at 4:45 PM, Fernando Magno Quintao Pereira wrote: > > Dear guys, > > I want to coalesce some copies, and I would like to know if > there is > any method that I can call, like JoinCopy from the old (LLVM 1.9) > LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM > 2.1), > but I do not want to call this analysis, as I have my own.

On Tuesday 25 September 2007 10:49, David Greene wrote: > I've hit a bug in a refactored version of coalescing and I'm trying to > understand what is going on. In particular, I'm curious about this > line in SimpleRegisterCoalescing.cpp: > > 00710 LHSValsDefinedFromRHS[VNI] = > RHS.getLiveRangeContaining(VNI->def-1)->valno; > > Why VNI->def-1?

On Wednesday 20 February 2008 14:14, David Greene wrote: > I discovered this through an assert I put into some of my own code. I want > to know if that assert is bogus or if there's a bug here. A little more information: the assert checks that after coalescing two nodes, all subregister live intervals for the register coaelsced to now interfere with whatever the eliminated live

On Mar 26, 2011, at 1:04 PM, Borja Ferrer wrote: > Hello Jakob, thanks for the reply. The three regclasses involved here are all subsets from each other and aren't disjoint. These are the basic descriptions of the regclasses involved to show what i mean: > > DREGS: R31R30, R29R28 down to R1R0 (16 regs) > DLDREGS: R31R30, R29R28 down to R17R16 (8 regs) > PTRREGS:

Hi, I'm implementing some variations of graph-coloring register allocators for LLVM. Many of them perform their phases (e.g. coalescing, graph simplification, spilling, color selection) in an iterative way. Since LLVM provides an implementation of the coalescing in the SimpleRegisterCoalescing class already, I would like to reuse it (even though I could of course create my own coalescing

On Monday 27 August 2007 15:13, Evan Cheng wrote: > 1. typedef std::set<const LiveInterval *> IntervalSet; > Please use SmallPtrSet instead. Ok. > 2. > + virtual void mergeIntervals(const LiveInterval &a, > + const LiveInterval &b, > + const MachineInstr &copy) {}; > > I find the name