similar to: [LLVMdev] convert llvm ir to selection Dag

Hi, Thanks for your reply. I have gone through the tutorial how to write llvm pass .. and but not able to figure out how should i proceed for this pass.. Can u please tell me some starting point for this.. Let say i have some add function.. define <4xfloat> add(<4xfloat>% in1, <4xfloat>% in2) { entry: %0 = fadd <4xfloat> %in1, %in2 ret <4xfloat> %0 }

Hi, I know using llc i can print machine code (-print-machineinstrs). How can i print machine code using llvm c++ api.. i looked into llc code but not able to find it.. Thanks & Regards, Pachauri

Woops, forgot to reply to the list too. > Hi, > > Have you read this page? http://llvm.org/docs/DebuggingJITedCode.html > > It contains pretty much what you're asking - it uses a command-line > switch to lli as opposed to the C++ interface, but if you're using > llvm::cl for options processing you get that flag automatically (try > ./your_tool --help | grep

Hi, I'm trying to build code for very short function and I encounter with a problem (or bug) in DAG selection algotithm. I have a node that was created in Combine(BeforeLegalizeTypes) and should be optimized in Combine(AfterLegalizeTypes). But LegalizeTypes() did not change anything and Combine(AfterLegalizeTypes) was not called. Vector legalization that comes afterwards just scalarized the

On Mon, Feb 6, 2012 at 11:54 PM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote: > Hi, > > I'm trying to build code for very short function and I encounter with a problem (or bug) in DAG selection algotithm. > I have a node that was created in Combine(BeforeLegalizeTypes) and should be optimized in Combine(AfterLegalizeTypes). But LegalizeTypes() did not change

Hello, Working on my (currently out-of-tree) BG/Q PPC enhancements, I've run into the following problem with vector type legalization. Here's a quick example: Scalarize node result 0: 0x2348420: v1f32 = extract_subvector 0x23434a0, 0x2348320 [ID=0] Scalarize node result 0: 0x2348220: v1f32 = extract_subvector 0x23434a0, 0x23466e0 [ID=0] Split node result: 0x23469e0: v4f32 =

Hi Hal, On 05/03/13 18:50, Hal Finkel wrote: > Hello, > > Working on my (currently out-of-tree) BG/Q PPC enhancements, I've run into the following problem with vector type legalization. Here's a quick example: > > Scalarize node result 0: 0x2348420: v1f32 = extract_subvector 0x23434a0, 0x2348320 [ID=0] > > Scalarize node result 0: 0x2348220: v1f32 = extract_subvector

Hi all, I plan to turn on the new type legalization infrastructure "LegalizeTypes" by default tomorrow. This is a redesign/reimplementation of the logic currently in LegalizeDAG that turns (for example) 64 bit arithmetic on a 32 bit machine into a series of 32 bit operations. As well as being a cleaner design, it also supports code generation for arbitrary precision integers such as

On Oct 26, 2008, at 1:03 AM, Duncan Sands wrote: > Hi all, I plan to turn on the new type legalization infrastructure > "LegalizeTypes" by default tomorrow. This is a redesign/ > reimplementation > of the logic currently in LegalizeDAG that turns (for example) 64 bit > arithmetic on a 32 bit machine into a series of 32 bit operations. > As well > as being a

I am trying to build llvm-2.7 using non-system gcc/binutils. My gcc version is 4.1.2, and binutils is 2.17.50.0.15. I get the following errors `.L2438' referenced in section `.gnu.linkonce.r._ZNK4llvm16DAGTypeLegalizer13getTypeActionENS_3EVTE' of /build/toolchain/src/llvm-2.7/objdir/Release/lib/libLLVMSelectionDAG.a(LegalizeTypes.o): defined in discarded section

On Thu, May 13, 2010 at 12:28 PM, john blair <mailtome200420032002 at yahoo.com> wrote: > I am trying to build llvm-2.7 using non-system gcc/binutils. My gcc version is 4.1.2, and binutils is 2.17.50.0.15. I get the following errors That version of gcc is known to have issues building LLVM; see http://llvm.org/docs/GettingStarted.html#brokengcc . Try upgrading your gcc version. -Eli

Hello folks, I'm sure this has been asked many times, but is there current work on decreasing the time taken by the DAG-based instruction selector, or the other phases of llc? I am just beginning to dive into LLVM, and I am interested in compile-time reductions that do not reduce code quality dramatically. For example, simply switching on "-fast-isel" (roughly 17% drop in code

*I'm trying to build an application that provides statistics of calls*>* and call recording. Someone told me this could be done out of band*>* with a SPAN (?) port that would replicate SIP and media packets to a*>* separate NIC without having to actually pass the real-calls thru*>* asterisk. It was explained that this SPAN port would in the SBC*>* would replicate data

At the beginning, I have the following chain: LOAD -> TRUNCATE -> ZERO_EXTEND. After Combine(BeforeLegalizeTypes) the optimization of ZERO_EXTEND gives me the new chain LOAD -> ANY_EXTEND -> AND. I want to optimize ANY_EXTEND but is not analyzed in the same Combine(). Combine(AfterLegalizeTypes) is no called at all. - Elena -----Original Message----- From: Eli Friedman

PPC Altivec supports vector type v16i8 (and others) where the element type is not legal (in llvm's implementation). When we have a BUILD_VECTOR of these types with constant elements, LegalizeTypes first promotes the element types to i32, then builds a constant pool entry of type v16i32. This is wrong. I can fix it by truncating the elements back to i8 in ExpandBUILD_VECTOR. Does

Hi Chris, > Why not define an "add with overflow" intrinsic that returns its value and > overflow bit as an i1? what's the point? We have this today with apint codegen (if you turn on LegalizeTypes). For example, this function define i1 @cc(i32 %x, i32 %y) { %xx = zext i32 %x to i33 %yy = zext i32 %y to i33 %s = add i33 %xx, %yy %tmp = lshr i33 %s, 32 %b = trunc

Hi Chris, > > what's the point? We have this today with apint codegen (if you turn on > > LegalizeTypes). For example, this function > > The desired code is something like: > > foo: > addl %eax, %ecx > jo overflow_happened > use(%ecx) how's an intrinsic going to help with this? Also, is there any chance of codegen being capable one day of

On Aug 3, 2009, at 3:09 PM, Dan Gohman wrote: >> >> We are currently doing this, however I think disabling such >> optimizations is a much better solution. > > An LLVM design goal is that backends should be able to outsmart > instcombine when necessary, rather than having instcombine be able > to disable parts of itself in order to avoid foiling the backends. >

Thanks for the reply Eli. I have the same version of gcc/binutils as my system gcc/binutils And it gets built without any errors with them. --- On Thu, 5/13/10, Eli Friedman <eli.friedman at gmail.com> wrote: > From: Eli Friedman <eli.friedman at gmail.com> > Subject: Re: [LLVMdev] Building llvm using non-system gcc/binutils > To: "john blair"

When I build LLVM with ENABLE_EXPENSIVE_CHECKS=1, make check fails: Running /home/foad/svn/llvm-project/llvm/trunk/test/CodeGen/ARM/dg.exp ... FAIL: /home/foad/svn/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll Failed with signal(SIGABRT) at line 1 while running: llvm-as < /home/foad/svn/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll | llc