similar to: [LLVMdev] [LLVMDev] [Solved] Finding the branching instructions!

Comments below. On Apr 15, 2008, at 4:24 AM, Nicolas Geoffray wrote: > OK, here's a new patch that adds the infrastructure and the > implementation for X86, ARM and PPC of GetInstSize and > GetFunctionSize. Both functions are virtual functions defined in > TargetInstrInfo.h. > > For X86, I moved some commodity functions from X86CodeEmitter to > X86InstrInfo. >

With a modified copy of LLVM (so it's probably my fault) I'm getting an assertion failure because isTwoAddrUse (in TwoAddressInstructionPass.cpp) is being called with a MachineInstr MI such that MI.getNumOperands() is 2, but MI.getDesc().getNumOperands() is 5. The assertion fails when that function calls MI.getOperand(2). My question is: is isTwoAddrUse doing the right thing here? static

> 1) Some machine instructions have implicit register operands. If you are > not including these in your calculations you will probably have some errors. > My apologies for not mentioning this earlier. > > You can find the set of implicit uses and defs by querying the > TargetInstDesc object for each MachineInstr (call MachineInstr::getDesc() to > get it, and then the

I know this is simple, but I want to be 100 percent sure I am doing this correctly. Would the following code be enough to add a simple unconditional branch instruction to a machine instruction? Do I need to set some key items in the MachineBasicBlock too? Is there more documentation on this subject? MachineBasicBlock * mbb = mf->CreateMachineBasicBlock( 0 ); mbb->getNumber();

Hi Susan, > 1. I tried running the PBQP allocator (as a dynamic pass), but that didn't > work.... Can you tell from this what I'm doing wrong? > The PBQP allocator is built into the LLVM CodeGen library, so the "-regalloc=pbqp" option is already available in llc. If you've built a copy of the PBQP allocator in a separate library it will try to re-register

I am looking for the slot index of a register around the given slot index Min. Is there a better way than the linear search: ... findDefUsesAroundIndex( LiveInterval* li, SlotIndex Min ) ... for( MachineOperand * mo = MRI->getRegUseDefListHead(li->reg); mo; mo = mo->getNextOperandForReg() ) { SlotIndex si = SI->getInstructionIndex( use.getOperand().getParent() ); if(

I have a live interval, and I would like to find out what SlotIndex the next use the register will occur? Is there any way to map a live interval back into instructions or SlotIndexes or blocks used by? - Thanks Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110120/fd429dbd/attachment.html>

Bump: Does profiling / run time information exist when dealing with machine basic blocks? Thanks, Jeff Kunkel On Tue, Sep 28, 2010 at 9:51 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > How do I find the profiling or run time information for machine basic > blocks from a machine function? There are quite a few optimization > that may be preformed with this information, when it

On Dec 14, 2010, at 3:46 PM, Richard Pennington wrote: > Notice that the label $BB0_1 is missing. If I disable filling in the > branch delay slots, I get: Is this with the latest SVN HEAD version of LLVM or some other version? The delay slot filler and many other things have been updated for the Microblaze backend. In particular, the commit r120095 for the MBlaze backend fixed some issues

I forgot to cc the list. On Sat, Oct 9, 2010 at 10:47 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > On Sat, Oct 9, 2010 at 10:37 AM, Michael Spencer <bigcheesegs at gmail.com> wrote: >>> On Sat, Oct 9, 2010 at 1:10 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: >>>> Hello, does LLVM already have a Random Number Generator built into >>>>

I'm just running VS 10 in debug mode. In a step by step set up: 1. I download the svn 2. I make my changes 3. I compile the libraries 4. I make changes to the code within my project 5. I compile my code, and I re-link llc with my changed files. 6. I repeat 4,5, and 6 until it finally works. - Jeff Kunkel On Tue, Nov 2, 2010 at 1:21 PM, Óscar Fuentes <ofv at wanadoo.es> wrote: >

I am plugging this into my code. If someone wants to take it out and add it to the llvm library, it's a simple Linear Congruential Generator, but here it is: typedef struct random_number_gen { unsigned a, c, seed, m; random_number_gen( unsigned seed, unsigned modulo ) : seed(seed), m(modulo) { unsigned primes[] = { 2, 3, 5, 7, 11, 13, 17, 19, 23, 29 };

Hi Jeff, There is an algorithm to build the dominator tree that is O(n2), where n is the number of nodes on the control flow graph. I believe exists another that is linear, but I don't which one of them is implemented in LLVM. The problem is that the branch predictor requires post dominance information. None of the LLVM basic passes require post dominance information (AFAIK), hence it is

Perhaps what I think is a problem really is not a problem. So when a jump occurs from one block A to block B, then the registers are certain state, and register allocation happens with the initial state defined by A->B. When a third block C jumps to block B, the state of the registers are different. Thus register allocation needs to account for the jump from C->B, by a few ways: 1. The

- I placed my code in the the existing CodeGen library. - No, it is not in the CMakeLists.txt. The code is separate from the rest of the CodeGen code, but it is linked into the code gen library automatically through the visual studio linker. Perhaps something funny is going on here. I will try placing the code directly in the library, and I will include it to the CMakeLists.txt. - Thanks - Jeff

I ran cmake to build the visual studio projects. Then I included my code under the Visual Studio interface, but I placed my code separate from the CodeGen code. Visual studio was smart enough to compile and link in my code into the CodeGen library. Thus, I did not need to add my code into the same directory as the CodeGen files, and I did not need to change the CMakeList.txt. The offical name is

How do I find the profiling or run time information for machine basic blocks from a machine function? There are quite a few optimization that may be preformed with this information, when it exists. Thanks, Jeff Kunkel

Also note: there may be multiple MachineBasicBlock's for a single BasicBlock. - David M On Fri, Oct 15, 2010 at 4:59 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > I don't think you can. > > The BasicBlock is a member of MachineBasicBlock. It is not inherited, > so it cannot be cast. The number of the MachineBasicBlock is not the > same as any BasicBlock values.

You said it was expensive, but if you had to put a big-o estimate on it, what would it be? -Thanks Jeff Kunkel On Tue, Nov 2, 2010 at 8:54 PM, Andrei Alvares <logytech at gmail.com> wrote: > Hello Jeff, > > On Tue, Nov 2, 2010 at 9:17 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > > My god! I would love a branch predictor! It would simplify many aspects > of >

I forgot to CC the forum. I found what was happening. The BranchFolder documentation says: // Note that this pass must be run after register allocation, it cannot handle // SSA form. > On Wed, Oct 6, 2010 at 8:05 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: >> No, I just noticed that blocks were separated. >> >> >> On Wed, Oct 6, 2010 at 8:04 PM, Bob Wilson