similar to: [LLVMdev] replace instruction

Displaying 20 results from an estimated 20000 matches similar to: "[LLVMdev] replace instruction"

2010 Jun 23
3
[LLVMdev] Instruction does not dominate all uses ???
Hi, I am trying to write a small pass. In my pass, I have inserted some instruction and used that in another. But, during OPT it is showing "Instruction does not dominate all uses" like following - %b.1 = bitcast i32 4 to i32 ; <i32> [#uses=8] %11 = add i32 %a.1, %b.1 ; <i32> [#uses=1]Instruction does not dominate all uses! Any
2010 Jun 05
0
[LLVMdev] Converting into SSA form
There is no existing pass to do this in LLVM, mostly because it wouldn't be useful for optimizing programs. From your input, mem2reg produces: define i32 @myfunc(i32 %x, i32 %y) nounwind { entry: %cmp = icmp sgt i32 %x, %y ; <i1> [#uses=1] br i1 %cmp, label %if.then, label %if.else if.then: ; preds = %entry %add = add
2010 Jun 05
2
[LLVMdev] Converting into SSA form
Suppose my Input function is like : myfunc(int x,int y){ int a=2, b=3,c=5; if(x>y) { c=a+b; a=6; } else { c=a*b; b=4; } a=c+a; c=a+b; } and the output should be : myfunc(int x,int y){ int a.0=2, b.0=3,c.0=5; if(x>y) { c.1=a.0+b.0; a.1=6; } else { c.2=a.0*b.0; b.1=4; }
2010 Jun 07
2
[LLVMdev] Converting into SSA form
Hi Jeffrey, Actually I am trying to implement "E-path PRE" which is based on non-algebric equivallence. So, the variable names need to be preserved. You said that I need to insert these to preserve variable %a.0 = bitcast i32 2 to i32 So, these need to be inserted before the mem2reg pass or within the pass. In first case, how to call an inbuilt pass after doing some analysis from my
2010 Jul 21
0
[LLVMdev] How to insert a basic block in an edge
Hi, I could not figure out, how to declare a Pass*. Can anyone give me an example, how to use SplitEdge() function ? Please help me out. Regards, Chayan On Tue, Jul 20, 2010 at 10:12 AM, Chayan Sarkar <chayan.ju at gmail.com> wrote: > Hi All, > > Still I could not figure out how to use Pass* while calling > SplitEdge() function. Can anyone provide me some example? > >
2010 Jul 20
2
[LLVMdev] How to insert a basic block in an edge
Hi All, Still I could not figure out how to use Pass* while calling SplitEdge() function. Can anyone provide me some example? Regards, Chayan On Sun, Jul 18, 2010 at 11:49 PM, Nick Lewycky <nicholas at mxc.ca> wrote: > Chayan Sarkar wrote: >> >> Hi, >> >> I have tried to use SplitEdge function, but failed. Actually the third >> parameter is a variable of
2010 Jun 05
3
[LLVMdev] Converting into SSA form
But, the mem2reg pass removes all load store instructions. It replaces all variables by their if possible (kind of constant propagation). I have generated the bitcode of the source program and the applied the mem2reg pass and obviously not getting desired thing. What I want is convert it into SSA form without replacing any variable by their constant value. Please elaborate on your point. Also,
2010 Jun 23
0
[LLVMdev] Instruction does not dominate all uses ???
Chayan Sarkar wrote: > Hi, > > I am trying to write a small pass. In my pass, I have inserted some > instruction and used that in another. But, during OPT it is showing > "Instruction does not dominate all uses" like following - > > %b.1 = bitcast i32 4 to i32 ; <i32> [#uses=8] %11 > = add i32 %a.1, %b.1 ;
2010 Jun 07
0
[LLVMdev] Converting into SSA form
E-path PRE requires the program in SSA form like SSAPRE algorithm. Then it finds the eliminatable path (e-path) for an expression and converts partially redundant to fully redundant and removes redundancy Chayan On Mon, Jun 7, 2010 at 1:58 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Sun, Jun 6, 2010 at 8:56 PM, Chayan Sarkar <chayan.ju at gmail.com> wrote: >> Hi
2010 Jun 27
1
[LLVMdev] How to assign undef value to a variable
Simply create an undef constant value and add a store instruction to store the undef value into the memory allocated by the alloca. I believe there is an llvm::Undef class. Check doxygen docs for details. -----Original Message----- From: Chayan Sarkar <chayan.ju at gmail.com> Sent: Sunday, June 27, 2010 12:05 PM To: llvmdev at cs.uiuc.edu <llvmdev at cs.uiuc.edu>; chayan.ju at
2010 Jun 07
1
[LLVMdev] Converting into SSA form
On Sun, Jun 6, 2010 at 8:56 PM, Chayan Sarkar <chayan.ju at gmail.com> wrote: > Hi Jeffrey, > > Actually I am trying to implement "E-path PRE" which is based on > non-algebric equivallence. So, the  variable names need to be > preserved. Then why do you want to run mem2reg before your optimization in the first place? -Eli
2010 Jun 01
0
[LLVMdev] Converting into SSA form
You can use STOREs and LOADs on memory and then use mem2reg pass. 2010/6/1 Chayan Sarkar <chayan.ju at gmail.com>: > Hi, > > Can anyone tell me, whether it is possible to convert a program into > SSA form without considering algebric equivalence ? > > regards, > Chayan > _______________________________________________ > LLVM Developers mailing list > LLVMdev at
2010 Jun 01
2
[LLVMdev] Converting into SSA form
Hi, Can anyone tell me, whether it is possible to convert a program into SSA form without considering algebric equivalence ? regards, Chayan
2010 Jun 18
1
[LLVMdev] Erasing Instruction
Hi, Can anyone tell me how to erase an instruction, (specially a load/store instruction) ? If I use Instr->eraseFromParent(), I get following error. Note the instruction does not have any use. opt: /home/chayan/llvm/llvm-2.6/include/llvm/ADT/ilist.h:218: llvm::ilist_iterator<NodeTy>& llvm::ilist_iterator<NodeTy>::operator++() [with NodeTy = llvm::Instruction]: Assertion
2010 Jun 05
0
[LLVMdev] Converting into SSA form
On Sat, Jun 5, 2010 at 2:03 AM, Chayan Sarkar <chayan.ju at gmail.com> wrote: > But, the mem2reg pass removes all load store instructions. It replaces > all variables by their if possible (kind of constant propagation). I > have generated the bitcode of the source program and the applied the > mem2reg pass and obviously not getting desired thing. > > What I want is convert
2010 Jun 21
1
[LLVMdev] Casting a Value
Hi, I have Value V of Type i32*. How can I convert/set it's Type to i32? Or How can I create another Value of Type i32 and with same name as V. I have tried Value *NewV = new Value(Type,scid); NewV->setName(V->getNameStr()); It causes stack dump. I am not sure as second argument in the Value constructor as scid (SubClassID). So I have mentioned 0. Any Idea how to do this? Regards,
2010 Jul 18
2
[LLVMdev] How to insert a basic block in an edge
Hi, I have tried to use SplitEdge function, but failed. Actually the third parameter is a variable of type Pass and it need to be non-null. But I could not figure out how to use it. Please help me out. Regards, Chayan On Sat, Jul 17, 2010 at 10:16 PM, Nick Lewycky <nicholas at mxc.ca> wrote: > Chayan Sarkar wrote: >> >> Hi all, >> >> Suppose in a CFG bb1 has two
2010 Jul 18
0
[LLVMdev] How to insert a basic block in an edge
Chayan Sarkar wrote: > Hi, > > I have tried to use SplitEdge function, but failed. Actually the third > parameter is a variable of type Pass and it need to be non-null. But I > could not figure out how to use it. Please help me out. The only reason it needs a non-NULL Pass* is to call llvm::SplitBlock which uses P->getAnalysisIfAvailable unconditionally. Feel free to wrap
2010 May 13
2
[LLVMdev] How to insert phi
Hi, I am new to llvm. I have project in llvm. For that I need SSA form, which is already implemented in llvm. Basically I want to know which pass insert phi and converts it to SSA form in llvm . Regards, Chayan
2010 Jul 17
2
[LLVMdev] How to insert a basic block in an edge
Hi all, Suppose in a CFG bb1 has two succesor bb3 and bb4, and bb3 has two predecessor bb1 and bb2. Now how can I insert a basic block between bb1 and bb3 that at the edge bb1-->bb3 . In general how can I insert a basic block on an edge? Regards, Chayan