similar to: [LLVMdev] v16i32/v16f32

On Wed, Jul 14, 2010 at 6:48 PM, shreyas krishnan <shreyas76 at gmail.com> wrote: > Hi >   I find  types such as v16i32, v16f32  missing in my llvm version 2.7 > > So does the following page not list them > http://llvm.org/docs/doxygen/html/classllvm_1_1MVT.html > > is that intentional for any reason or can I just add them  ? As far as I know, they're not there

I tried adding them in my backend however I run into the assertion assert((unsigned)VT.SimpleTy < sizeof(LoadExtActions[0])*4 && ExtType < array_lengthof(LoadExtActions) && "Table isn't big enough!"); What does the assertion mean ? thanks for all help!! shrey On Wed, Jul 14, 2010 at 6:56 PM, Eli Friedman <eli.friedman at

On Fri, Jul 16, 2010 at 5:14 PM, shreyas krishnan <shreyas76 at gmail.com> wrote: > I tried adding them in my backend however I run into the assertion > >  assert((unsigned)VT.SimpleTy < sizeof(LoadExtActions[0])*4 && >           ExtType < array_lengthof(LoadExtActions) && >           "Table isn't big enough!"); > > What does the

Thanks Eli ...I actually did that ..bumped it up by 2 that I had added. Any thing else that I might have done wrong ? I can see a different assert where it clearly depends on LAST_VALUETYPE assert((unsigned)VT.SimpleTy < MVT::LAST_VALUETYPE thanks shrey On Fri, Jul 16, 2010 at 5:20 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Fri, Jul 16, 2010 at 5:14 PM, shreyas

hi Hao, I started to upstream and the second patch is stalled under review now. - Elena -----Original Message----- From: Hao Liu [mailto:haoliuts at gmail.com] Sent: Friday, March 13, 2015 05:56 To: Demikhovsky, Elena Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Indexed Load and Store Intrinsics - proposal Hi Elena, I think such intrinsics are very useful. Do you have any plan to

Hi I am running into bunch of windows build issues. Can someone please provide help on what might be going wrong llvm\win32\Configure\..\llvm\ADT\hash_set.h 1>The system cannot find the file specified. Similarly 2>c1xx : fatal error C1083: Cannot open source file: '..\..\lib\Support\Annotation.cpp': No such file or directory thanks in advance shrey

Hi, Recent Intel architectures AVX-512 and AVX2 provide vector gather and/or scatter instructions. Gather/scatter instructions allow read/write access to multiple memory addresses. The addresses are specified using a base address and a vector of indices. We'd like Vectorizers to tap this functionality, and propose to do so by introducing new intrinsics: VectorValue = @llvm.sindex.load

done http://llvm.org/bugs/show_bug.cgi?id=5331 shrey On Wed, Oct 28, 2009 at 3:29 PM, Óscar Fuentes <ofv at wanadoo.es> wrote: > shreyas krishnan <shreyas76 at gmail.com> writes: > >>     I am running into bunch of windows build issues. Can someone >> please provide help on what might be going wrong >> >> >>

Hi As part of a requirement that I have, I would like to have some globals reside in registers always. So these variables would not have a home location in memory. I realize the code generated would also need to be aware of this. I do have some ideas on how to change the code appropriately. But right now, I am more concerned about how to fit this requirement (sort of interprocedural) into the

Hi I run into an issue as part of splitting a critical edge during LICM. When a new basic block is created and needs to be added into the dominator tree, the block is already in the dominator tree. I print the dominator tree and I see it is added into the tree as child of node it is supposed to dominate. How do I debug to find out why/when its getting added into the tree. ? Tips/suggestions on

Hi all I am building LLVM 2.6 on VC++. I am running into this problem where even builds without any changes whatsoever causes rebuilding of certain directories like table gen of intrinsics and x86 target files. This then leads to build of the x86 codegen. Is this expected ? Any pointers to how I can avoid this? thanks shrey

Thanks Eli, Jaffrey for the pointer! A couple of further questions if I may 1. Isnt this assuming that register being pinned to is always esi when it comes to using a calling convention. I would like to pin the register through a pass and so I dont know which registers ends up being used for a particular value before hand 2. I would also like to allocate some small aggregates into registers. I

I 100% get that we might not like the decisions clang-format is making, but how does one overcome this when adding new code? The pre-merge checks enforce clang-formatting before commit and that's a common review comment anyway for those who didn't join the pre-merge checking group. I'm just wondering are we not all following the same guidelines? Concerns of clang-format not being good

thanks for the help ..I could build it with cmake generated project files Being a newbie with cmake one question, is it equivalent to configure in windows environment and so would need to be run everytime I change the source location ? thanks shrey On Wed, Oct 28, 2009 at 4:31 PM, shreyas krishnan <shreyas76 at gmail.com> wrote: > done > >

Chris recently wrote up a way to do this at http://nondot.org/sabre/LLVMNotes/GlobalRegisterVariables.txt On Thu, Jul 16, 2009 at 1:53 PM, shreyas krishnan<shreyas76 at gmail.com> wrote: > Hi >   As part of a requirement that I have, I would like to have some > globals reside in registers always. So these variables would not have > a home location in memory. > I realize the

I am sorry, I actually meant Machine Instructions - is there a way ? One use of that is I would like to be able to group instructions together and be able check their group quickly. thanks shrey On Sun, Aug 14, 2011 at 1:16 AM, Bill Wendling <wendling at apple.com> wrote: > On Aug 13, 2011, at 11:04 AM, shreyas krishnan wrote: > >> Hi >>    Is there a way to associate

Hi if I have group of instructions that belong to same basic block, how can I determine which of these occurs the last ? thanks Shrey

Hi I am running into a legalize dag issue after custom lowering a load. If someone can give me pointers that would be great. I am using llvm 2.6 When custom lowering a load, the following code gets executed. Tmp1 = TLI.LowerOperation(Tmp3, DAG); if (Tmp1.getNode()) { Tmp3 = LegalizeOp(Tmp1); Tmp4 = LegalizeOp(Tmp1.getValue(1)); <----------------- what

Hi I would like to add transformation - mostly peephole- after register allocation that make use of def-use information. Would it be possible to make use of the dag codebase to help do that ? thanks for any pointers shrey

thanks for the help ..I do add the chain and the result. My code is like this ... SDValue Ops[] = { load->getChain(), load->getOperand(1), load->getBasePtr(), des }; DAG.getNode(CustomOpc, NodeTys, Ops, 4); thanks again! shrey On Thu, Nov 12, 2009 at 4:41 PM, Anton Korobeynikov <anton at korobeynikov.info> wrote: >> My problem is that the second call asserts inside