similar to: [LLVMdev] How to prevent an instruction to be executed more than once?

Hello- Doing control-flow (jumps and/or labels) in inline asm is a really bad idea. What are you trying to achieve? Alistair On 24 Jun 2010, at 12:54, Xinfinity wrote: > > Hi LLVM-devs, > > I am looking for a way to prevent an instruction to be executed more than > once, or duplicated .. I know that by default everything can be duplicated, > but is there a work-around? >

I need to mark the beginning of some regions of code, that I want to patch at runtime. In this case, I want to mark the beginning of BB4 and then to patch the jumps, because I want to temporarily change the flow at runtime and then to restore the previous version. In order to patch, I need to know the exact structure of the generated code. So, I might have a BasicBlock like: BB4: call void asm

I want to do the following: suppose the program structure: bb / \ bb1 bb2 \ / bb3

---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Mon, Nov 21, 2011 at 10:30 AM Subject: Re: [LLVMdev] Order of Basic Blocks To: Benjamin Kramer <benny.kra at googlemail.com> This worked, though the RPO_iterator apparently wasn't what I was looking for anyways, it seems it doesn't rreally go top->down. I have a simple example code,

> On Sep 21, 2016, at 2:23 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > > > > // For all predecessors of this MBB, find the set of VarLocs that > // can be joined. > for (auto p : MBB.predecessors()) { > auto OL = OutLocs.find(p); > // Join is null in case of empty OutLocs from any of the pred. > if (OL == OutLocs.end()) >

Hi, It looks like PDT.getRootNode() returns NULL for: define fastcc void @c974001__lengthy_calculation. 1736(%struct.FRAME.c974001* nocapture %CHAIN.185) noreturn { entry: br label %bb bb: br label %bb } Isn't it a bug in PostDominatorTree? Please note that this crashes: opt -postdomtree -debug dom_crash.bc I think this should be reported as a bug, -Jakub On Sep 3, 2009, at

Jakub Staszak wrote: > Hi, > > It looks like PDT.getRootNode() returns NULL for: > > define fastcc void @c974001__lengthy_calculation. > 1736(%struct.FRAME.c974001* nocapture %CHAIN.185) noreturn { > entry: > br label %bb > > bb: > br label %bb > } > > > Isn't it a bug in PostDominatorTree? > > Please note that this crashes: >

Hi all, Suppose in a CFG bb1 has two succesor bb3 and bb4, and bb3 has two predecessor bb1 and bb2. Now how can I insert a basic block between bb1 and bb3 that at the edge bb1-->bb3 . In general how can I insert a basic block on an edge? Regards, Chayan

Dear all, I'm working on an exploratory backend on llvm. In the instruction set I'm using I have an instruction (called DECJNZ) that decrements a register and, if the decremented value is not zero, jumps (with a relative jump) to a given offset. I've described in tablegen this instruction as follow: def DECJNZ : Instruction { let Namespace = "MyTarget"; let

I have created a new basic block. Now I want to make copy of instructions from one basic block to another . How to do that ? -- regards, soumya prasad ukil -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20101115/ddb0c4ab/attachment.html>

On Nov 14, 2010, at 12:13 PM, Soumya Prasad Ukil wrote: > I have created a new basic block. Now I want to make copy of instructions from one basic block to another . How to do that ? See CloneBasicBlock @ Transforms/Utils/Cloning.h - Devang

Hi, I have tried to use SplitEdge function, but failed. Actually the third parameter is a variable of type Pass and it need to be non-null. But I could not figure out how to use it. Please help me out. Regards, Chayan On Sat, Jul 17, 2010 at 10:16 PM, Nick Lewycky <nicholas at mxc.ca> wrote: > Chayan Sarkar wrote: >> >> Hi all, >> >> Suppose in a CFG bb1 has two

Hello, Bug is already fixed by Chris (see: http://llvm.org/bugs/show_bug.cgi?id=4915) . I added getRootNode() == NULL condition to my patch. It's not a great solution, but it is enough for now I think. New patch attached. -Jakub -------------- next part -------------- A non-text attachment was scrubbed... Name: dse_ssu-2.patch Type: application/octet-stream Size: 17762 bytes Desc: not

Dear all, I'm currently working on the automated program analysis tool AProVE (http://aprove.informatik.rwth-aachen.de/) and would like to use LLVM for analysis of C programs. I have the following example C program dealing with simple lists of integers: ------------ start C example ------------- #include<stdlib.h> struct list_el { int val; struct list_el * next; }; typedef

Hi, this question might be a bit silly: apart from the language reference(http://llvm.org/docs/LangRef.html#switch-instruction) page, are there additional rules for a regular llvm frontend to generate llvm IRs? There are a few cases that I got from clang/llvm-gcc/dragonegg when compiling *C* source code into llvm IR: 1. It seems that there is ONLY ONE ReturnInst(and NO InvokeInst) for such llvm

Hi All, Still I could not figure out how to use Pass* while calling SplitEdge() function. Can anyone provide me some example? Regards, Chayan On Sun, Jul 18, 2010 at 11:49 PM, Nick Lewycky <nicholas at mxc.ca> wrote: > Chayan Sarkar wrote: >> >> Hi, >> >> I have tried to use SplitEdge function, but failed. Actually the third >> parameter is a variable of

Example. Assuming the cap is 'C' void bar() { // ENTRY count is 4*C, after capping it becomes 'C' ... } void test() { // BB1: count(BB1) = C bar(); // BB2: count(BB2) = C bar(); } void test2() { // BB3: count(BB3) = C bar(); // BB4: count(BB4) = C bar(); } What would inliner see here ? When it sees callsite1 -- it might mistaken that is the

On Wed, Jul 25, 2012 at 12:48 AM, Michele Scandale <michele.scandale at gmail.com> wrote: > Dear all, > > I'm working on an exploratory backend on llvm. In the instruction set I'm using > I have an instruction (called DECJNZ) that decrements a register and, if the > decremented value is not zero, jumps (with a relative jump) to a given offset. > > I've

Hi, How does the requirement that phi instructions have one value per predecessor basic block interact with indirectbr instructions? For instance, take the following code: L1: br i1 %somevalue, label %L2, label %L3 L2: %ret1 = i8* blockaddress(@myfunction, %L5) br label %L4 L3: %ret2 = i8* blockaddress(@myfunction, %L6) br label %L4 L4: %ret = phi i8* [%ret1, L2], [%ret2, L3]

Hi, I'm having problems with the LoopIdiomRegognizer crashing on me with An asserting value handle still pointed to this value! UNREACHABLE executed at ../lib/IR/Value.cpp:695! If I remove AU.addPreserved<LoopInfoWrapperPass>(); or AU.addPreserved<AAResultsWrapperPass>(); everything goes well. The C-code triggering this is void foo(int a[10][10]) { int i, j,