similar to: [LLVMdev] Heads up: Local register allocator going away

Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] Heads up: Local register allocator going away"

2010 Jun 04
0
[LLVMdev] Heads up: Local register allocator going away
On Thu, 2010-06-03 at 02:53 +0200, Jakob Stoklund Olesen wrote: > If you are using the local register allocator, please try switching to the fast allocator and report any bugs you find. > Tried it, and it seems to break quite a big chunk of our tests on SPU :) Before r103488 ("Mostly rewrite RegAllocFast") there was no problem. But with r103488, I get a:
2010 Jun 04
2
[LLVMdev] Heads up: Local register allocator going away
On Jun 4, 2010, at 1:57 AM, <Kalle.Raiskila at nokia.com> <Kalle.Raiskila at nokia.com> wrote: > On Thu, 2010-06-03 at 02:53 +0200, Jakob Stoklund Olesen wrote: >> If you are using the local register allocator, please try switching to the fast allocator and report any bugs you find. >> > Tried it, and it seems to break quite a big chunk of our tests on SPU :)
2010 Jun 08
0
[LLVMdev] Heads up: Local register allocator going away
On Fri, 2010-06-04 at 20:05 +0200, Jakob Stoklund Olesen wrote: > You should fix SPUTargetLowering::LowerCall to make sure there is an unbroken chain of flag ties between CopyFromReg and BRASL. At least ARM, MBlaze, and Blackfin are doing this, if you need example code. > Thanks for the tip. This got fixed in 105601. And with that, half of the problematic tests appearing with
2015 Jan 02
3
[LLVMdev] "ran out of registers during register allocation"
I'm getting this error in RegAllocFast.cpp in compiling one source file in test-suite as the result of a new Mips fast-isel patch I was testing. It apparently just generates bad code and continues? // Nothing we can do. Report an error and keep going with a bad allocation. if (MI->isInlineAsm()) MI->emitError("inline assembly requires more registers than
2011 Jul 11
4
[LLVMdev] RegAllocFast uses too much stack
I discovered recently that RegAllocFast spills all the registers before every function call. This is the root cause of one of our recursive functions that takes about 150 bytes of stack when built with gcc (same at -O0 and -O2, or 120 bytes at llc -O2) taking 960 bytes of stack when built by llc -O0. That's pretty bad for situations where you have small stacks, which is not uncommon for
2015 Feb 25
7
virtio balloon: do not call blocking ops when !TASK_RUNNING
Hi all, with the recent kernel 3.19, I get a kernel warning when I start my KVM guest on s390 with virtio balloon enabled: [ 0.839687] do not call blocking ops when !TASK_RUNNING; state=1 set at [<0000000000174a1e>] prepare_to_wait_event+0x7e/0x108 [ 0.839694] ------------[ cut here ]------------ [ 0.839697] WARNING: at kernel/sched/core.c:7326 [ 0.839698]
2015 Feb 25
7
virtio balloon: do not call blocking ops when !TASK_RUNNING
Hi all, with the recent kernel 3.19, I get a kernel warning when I start my KVM guest on s390 with virtio balloon enabled: [ 0.839687] do not call blocking ops when !TASK_RUNNING; state=1 set at [<0000000000174a1e>] prepare_to_wait_event+0x7e/0x108 [ 0.839694] ------------[ cut here ]------------ [ 0.839697] WARNING: at kernel/sched/core.c:7326 [ 0.839698]
2010 Aug 05
1
[LLVMdev] RegAllocFast assertion in trunk...
Any ideas? Instruction uses an alias of an allocated register UNREACHABLE executed at RegAllocFast.cpp:358! 0 clang 0x0000000101309bc2 PrintStackTrace(void*) + 34 1 clang 0x000000010130a863 SignalHandler(int) + 707 2 libSystem.B.dylib 0x00007fff8056935a _sigtramp + 26 3 libSystem.B.dylib 000000000000000000 _sigtramp + 2141809856 4 clang 0x00000001012dd96d
2010 Oct 28
2
[LLVMdev] [LLVMDev] Register Allocation
I have noticed quite a few changes regarding register allocation. I am wondering will there be support for radically different data structures other than the LiveIntervals, Virtual Register Map, etc? I have build a custom data structure which has it's own intermediate representation like live-intervals, but much more conducive for my allocation algorithm. I do not know if LiveIntervals can
2011 Jul 11
0
[LLVMdev] RegAllocFast uses too much stack
On Jul 11, 2011, at 1:48 PM, Nick Lewycky wrote: > I discovered recently that RegAllocFast spills all the registers before every function call. This is the root cause of one of our recursive functions that takes about 150 bytes of stack when built with gcc (same at -O0 and -O2, or 120 bytes at llc -O2) taking 960 bytes of stack when built by llc -O0. That's pretty bad for situations where
2015 Jan 03
2
[LLVMdev] "ran out of registers during register allocation"
It seems like it might be a legitimate complaint from the register allocator. It's trying to get an accumulator (not a general purpose register) and the accumulator is 64 bit. It's using a part of the Mips backend that I have not worked in so I have to research this a bit. The multiply instruction is a pseudo multiply in the mips backend and it needs the accumulator which a special
2011 Jul 11
3
[LLVMdev] RegAllocFast uses too much stack
On Mon, Jul 11, 2011 at 2:44 PM, Eric Christopher <echristo at apple.com> wrote: > > On Jul 11, 2011, at 1:48 PM, Nick Lewycky wrote: > >> I discovered recently that RegAllocFast spills all the registers before every function call. This is the root cause of one of our recursive functions that takes about 150 bytes of stack when built with gcc (same at -O0 and -O2, or 120 bytes
2017 Sep 08
2
Live Register Spilling
Hi All, I faced some problems while using the BuildMI(). Currently, i am trying to replace specific MI with a series of new MI. I wrote a routine under the processFunctionAfterISel() to detect the targeted MI and replace it accordingly. After using BuildMI() to perform my replacement, i realize there are unnecessary spilling and reloading of registers in the assembly generated. By checking
2017 Sep 11
3
Live Register Spilling
Hi Matthias, Sorry for the late reply. Yes, you are correct, I do have optnone attribute on my function. I did pass -O0 to the tools. For your information, my invocations are as below: clang --target=mips-unknown-linux -mips32 test.c -emit-llvm -S llc -O0 -march=mips -mcpu=mips32 test.ll -o test.s Based on the generated .ll file, there is optnone attribute on the function, i
2010 Oct 28
0
[LLVMdev] [LLVMDev] Register Allocation
On Oct 28, 2010, at 9:40 AM, Jeff Kunkel wrote: > I have noticed quite a few changes regarding register allocation. I am > wondering will there be support for radically different data > structures other than the LiveIntervals, Virtual Register Map, etc? Not any more than we already have. If anything, these data structures are going to be simplified. For instance, VirtRegMap's
2013 Apr 30
1
[LLVMdev] New Register allocation algorithm
Hi, I wanted to write a new register allocation algorithm. I wrote it the same way RegAllocFast has been written and registered it. I added it to ForceCodegenLinking struct as well. But after build, it is not listed in llc --help. I tried to change the registered name of greedy algorithm to something else and that doesnt seem to be reflecting in llc help either. Am i supposed to build llvm
2020 Jul 02
2
flags to reproduce clang -O3 with opt -O3
Hello, I've been trying to figure out how to reproduce the results of a single clang -O3 compilation to a binary with a multi-step process using opt. Specifically I have: clang -O3 foo.c -o foo.exe which I want to replicate with: clang -O0 -c -emit-llvm foo.c opt -O3 foo.bc -o foo_o.bc clang foo_o.bc -o foo.exe Any hints / suggestions on what additional flags I need to produce the same
2011 Sep 26
0
[LLVMdev] Greedy Register Allocation in LLVM 3.0
Just a quick question: is greedy still a local allocator (i.e. only takes into consideration the current bb) or a global one (takes into consideration the whole function)? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110926/d87aa2bd/attachment.html> -------------- next part -------------- A non-text
2020 Aug 24
2
Intel AMX programming model discussion.
Hi, Yuanke, Thanks for writing this up. Let me back up a bit because the scheme I proposed last week doesn't work without further modification: within a particular "configuration region" (i.e., the code in between the LDTILECFG and the TILERELEASE (or next LDTILECFG)), each tile register can only be used with one shape, and in addition, no register can have its shape changed
2020 Jul 03
2
flags to reproduce clang -O3 with opt -O3
Awesome, thanks! I'd like to have the last step (llc in your example) not perform additional optimization passes, such as O3, and simply use the O3 pass from opt in the previous line. Do you happen to know if I should use 'llc -O0 foo_o.bc -o foo.exe' instead to achieve this? On Thu, Jul 2, 2020 at 6:35 PM Mehdi AMINI <joker.eph at gmail.com> wrote: > > > On Thu,