Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Flags and Custom Inserters in code generation"
2014 Sep 03
2
[LLVMdev] Enable debug for MSP430
Hi Gents,
For those of us with out-of-tree backends which are not 32bit, the msp430 backend is a useful vehicle for examining changes and testing out ideas.
So I was wondering about enabling debug output on the MSP430 backend so that I can illustrate a few issues to Adrian and you on the variable pieces side. (there doesn't appear to be any specific person claiming the msp430 code right
2017 Jul 05
3
MSP430 code generation from LLVM IR
Hello,
While trying to find out why the LDC compiler refuses to generate object
code for MSP430 targets (but generates MSP430 assembly or LLVM IR/bitcode),
I came across the following apparent inconsistency.
This works:
$ clang --target=msp430 -c test.c
This doesn't work:
$ clang --target=msp430 -S -emit-llvm test.c
$ llc -filetype=obj test.ll
/opt/msp430/bin/llc: target does not support
2018 Jun 17
2
status of msp430?
Hello,
I have a user asking about msp430 support for Zig. When they try to target
msp430, this error is triggered:
if (target_machine->addPassesToEmitFile(MPM, dest, ft)) {
*error_message = strdup("TargetMachine can't emit a file of
this type");
return true;
}
I tried using clang alone: clang -c add.c -target msp430-unknown
int add(int
2010 Dec 15
2
[LLVMdev] Optimization passes break machine instructions on new backend
Hello!
I'm working on a new back-end and have hit a bit of a snag. I'm working on
getting selectcc working and have followed the MSP430 model of emitting a
custom CMP and SELECT_CC node and matching that with a pseudo-instruction
that has useCustomEmitter=1. However, my output ends up very wrong, despite
the Machine code being initially correct:
# Machine code for function func:
Function
2017 Jul 06
2
MSP430 code generation from LLVM IR
On Thu, Jul 6, 2017 at 1:35 AM, Nicholas Wilson <
iamthewilsonator at hotmail.com> wrote:
> Luís, try using the -no-integrated-as flag to execute the assembler for
> you.
> We should probably make that the default for MSP430.
>
Cool. When I did that on macOS, LDC generated a lot of complaints, possibly
because it is assuming mach-o files. I tried changing from -mtriple=msp430
2017 Jul 06
2
MSP430 code generation from LLVM IR
On Thu, Jul 6, 2017 at 2:19 AM, Tim Northover <t.p.northover at gmail.com>
wrote:
> On 5 July 2017 at 17:51, Luís Marques via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > Cool. When I did that on macOS, LDC generated a lot of complaints,
> possibly
> > because it is assuming mach-o files. I tried changing from
> -mtriple=msp430
> > to
2012 Aug 14
2
[LLVMdev] Load serialisation during selection DAG building
On Aug 14, 2012, at 2:05 PM, Steve Montgomery <stephen.montgomery3 at btinternet.com> wrote:
> Further to my earlier question, I'm perhaps a bit confused about memory serialisation. The following example, compiled using clang for the MSP430:
>
> target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
> target triple = "msp430-??-??"
>
2018 Dec 19
2
Command line -mcpu= and -march=
Hi
I'm doing a port of Clang/LLVM - purely for the educational value - to the MC6809 (and HD6309 as a dub target) processors. I'll also want to eventually provide direct support for the AM9511 floating-point coprocessor as an option. I'm working with bleeding-edge code from the Git mirror.
I've made some pretty decent progress; I copied the llvm/lib/Targets/MSP430 Target to
2019 Nov 04
4
Debugging clang with debugger breakpoints ?
Hi David,
Thank you for your patience but I still don’t get it: I don’t see how that is a “command”, as it’s just a list of strings that state command options.
I know how to use the debugger, this is what I attempt to debug:
clang --target=msp430 -emit-llvm -c -S -Oz main.c
The debugger works fine, but only on the main thread. However breakpoints do not work with the code that was invoked
2012 Oct 08
1
[LLVMdev] Multiply i8 operands promotes to i32
> At -O0, you don't. __mulsi3 is the obvious lowering, and you're doing
> something wrong if your tools don't provide it.
MSP430 is 16 bit target, so mulsi is a bit expensive there, mulhi /
mulqi can be implemented via hardware multiplier.
There are several problems wrt 16 bit support inside LLVM in general
and msp430 in particular:
1. In some places LLVM expectes 32 bit or 64
2009 May 04
2
[LLVMdev] leveraging back-end C compiler features in the gcc-based front-end
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
<meta content="text/html;charset=ISO-8859-1" http-equiv="Content-Type">
</head>
<body bgcolor="#ffffff" text="#000000">
<font size="-1"><font face="Verdana">wow!!! i would be interested in
trying
2015 Dec 30
2
Substitute instruction with a jump to a library code
I'm trying to find a way to emulate a floating point instruction, say a
floating point add. My understanding is that in order to do that I need to
execute
setOperationAction(ISD::FADD, (MVT::f32, Expand);
setOperationAction(ISD::FADD, (MVT::f64, Expand);
in MyTargetISelLowering.cpp, MyTargetLowering::MyTargetLowering(...).
However for some reason I'm still seeing a floating point add in
2009 Dec 18
0
[LLVMdev] problem when use inline asm for msp430 target
Hello
> inline asm code is like below:
>
> void test(unsigned short a) {
> asm("myinstr my16bitreg, %0"::"r"(a));
> }
> I want it generate instruction "myinstr my16bitreg, r15"
>
> I execute
> llc test.bc -march = msp430 -o test.s
> then it reports
> "LLVM ERROR: Couldn't allocate input reg for constraint
2015 Dec 30
3
Substitute instruction with a jump to a library code
On Wed, Dec 30, 2015 at 2:48 AM, Anton Korobeynikov <anton at korobeynikov.info
> wrote:
> Just a side note - the assembly posted is clearly ARM, not MSP430 :)
Isn't MSP430 an ARM based chip?
--
Rail Shafigulin
Software Engineer
Esencia Technologies
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
2019 Nov 04
2
Debugging clang with debugger breakpoints ?
Hi David,
I understand what you say, but have you actually read my messages? I don’t think so,
Anyway, I will repost the question in case someone else can help.
Thanks
John
> On 4 Nov 2019, at 22:18, Zachary Turner <zturner at roblox.com> wrote:
>
>
>
> On Mon, Nov 4, 2019 at 1:11 PM Joan Lluch via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at
2011 Mar 16
3
[LLVMdev] Calls to functions with signext/zeroext return values
In SelectionDAGBuilder::visitRet(), there is this bit of code:
// FIXME: C calling convention requires the return type to be promoted
// to at least 32-bit. But this is not necessary for non-C calling
// conventions. The frontend should mark functions whose return values
// require promoting with signext or zeroext attributes.
if (ExtendKind !=
2010 Jun 11
2
[LLVMdev] r98938 broke argument passing on MSP430?
Hello,
Yesterday I noticed that MSP430 argument passing is broken in trunk;
see http://llvm.org/PR6573 for details and testcases. The problem is
that calls aren't being preceded by instructions that put the
arguments into registers. I backtracked my working copy and then
stepped forward until it broke between r98937 and r98938. Refining
further, I found that rolling back the
2013 Jul 22
0
[LLVMdev] Inst field in MSP430InstrFormats.td
The Inst field is used to specify instruction encodings, which are then used to generate assemblers and disassemblers. I'm not sure offhand, but it's possible that the MSP430 backend doesn't make use of an auto-generated assembler.
--Owen
On Jul 21, 2013, at 4:19 PM, David Wiberg <dwiberg at gmail.com> wrote:
> Hello,
>
> Within the file
2013 Jul 21
3
[LLVMdev] Inst field in MSP430InstrFormats.td
Hello,
Within the file "MSP430InstrFormats.td" there is a class called
"MSP430Inst" which has "Instruction" as superclass. Within this class
there is a field called "Inst" (field bits<16> Inst;) which gets
assigned in classes which specifies a specific instruction format,
e.g. IForm contains:
let Inst{12-15} = opcode;
let Inst{7} = ad.Value;
let
2008 Sep 12
2
[LLVMdev] Selection Condition Codes
Eli, Thanks for the tips.
I've been able to get something working using a custom instruction
inserter, however, I'm still having the problem of linking together the
setcc and the select_cc commands. I want to turn the setcc into a
comparison and use the results in the select_cc register. However, the
comparison information is in the select_cc instruction and the result of
the comparison