similar to: [LLVMdev] Question about maturity of various ARM instruction sets in llvm 2.6

On Wed, Jul 18, 2012 at 6:08 PM, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote: >> On 18 July 2012 15:46, salvatore benedetto >> <salvatore.benedetto at gmail.com> wrote: >>> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c >>>

Hi Robb, When you run llvm-gcc with -v, you should see as part of the output something like: gcc version 4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2366.3) That last bit on the end is an llvm tag version and should do the trick for what you're looking for. They generally refer to the tags at http://llvm.org/svn/llvm-project/llvm/tags/Apple. -Jim On Oct 4, 2010, at 4:50 PM, Robb

I'd like to know if there is a way to find out which llvm version a given version of llvm-gcc is using for code generation. Specifically, I'm working with Xcode 3.2.5's arm-apple-darwin10-llvm-g++-4.2 Calling it with --version and --verbose don't give any hints. I want to run the compiler with --emit-llvm and eventually call llc. llc isn't included in Xcode so I want to

On Mar 11, 2010, at 5:47 PM, Robb Kistler wrote: > I'm trying to build a very large shared library (bundle) for PPC on Mac OS X 10.5. The build looks something like this, where mybundlebitcode.o is the large object > > llc -relocation-model=pic -o=mybundle.s mybundlebitcode.o > gcc -arch ppc -c -x assembler -o mybundle.o mybundle.s > g++ -o mybundle.bundle -bundle mybundle.o

On Mar 11, 2010, at 6:07 PM, Chris Lattner wrote: > On Mar 11, 2010, at 5:47 PM, Robb Kistler wrote: > >> I'm trying to build a very large shared library (bundle) for PPC on >> Mac OS X 10.5. The build looks something like this, where >> mybundlebitcode.o is the large object >> >> llc -relocation-model=pic -o=mybundle.s mybundlebitcode.o >> gcc

Well how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3

On Thu, Oct 13, 2011 at 11:25 AM, Joe Abbey <jabbey at arxan.com> wrote: > LLVM Supports: > ARMv4T  -> ARM7TDMI > ARMv5TE -> ARM926EJ-S >         -> XScale > ARMv6   -> ARM1136J(F)-S > ARMv6ZK -> ARM1176JZ(F)-S > ARMv7A  -> Cortex-A8 >            Cortex-A9 > ARMv7M  -> Cortex-M3 Does the LLVM code generator generate Thumb code in addition to

Hi Sorry, the reason I joined the list is for help finding a bug that occurs when libvorbisenc is compiled and run on ARM EABI systems (current Debian, Gentoo, OpenEmbedded etc). The symptom is that oggenc produces shorter ogg files than it should (about 1/2 size) that decode to the correct duration but of total silence. libvorbis/examples/encoder_example does the same on these systems, but

On Thu, Aug 5, 2010 at 3:11 PM, David A. Greene <greened at obbligato.org> wrote: > David Greene <dag at cray.com> writes: > >> I'm asking because I'm having some trouble converting some AVX patterns >> over to the new system.  I'm getting this error from tblgen: >> >> VyPERM2F128PDirrmi:   (set:isVoid VR256:v4i64:$dst, (vector_shuffle:v4i64

I have a code generation question for ARM with VFP and NEON. I am generating code for the following function as a test: void FloatingPointTest(float f1, float f2, float f3) { float f4 = f1 * f2; if (f4 > f3) printf("%f\n",f2); else printf("%f\n",f3); } I have tried compiling with: 1. -mfloat-abi=softfp and -mfpu=neon 2.

Looks like pinsr is not being generated on llvm-x86_64-ubuntu... jabbey at davinci:~$ /home/jabbey/src/osuosl/buildbot/sandbox/llvm-x86_64-ubuntu/llvm-x86_64-ubuntu/llvm/Debug+Asserts/bin/llc < /home/jabbey/src/osuosl/buildbot/sandbox/llvm-x86_64-ubuntu/llvm-x86_64-ubuntu/llvm/test/CodeGen/X86/mmx-pinsrw.ll -mtriple=x86_64-linux -mattr=+mmx,+sse2 produces: .file "<stdin>"

I was trying to using llvm to targeting ARMv5TE -- 此致 礼 罗勇刚 Yours sincerely, Yonggang Luo -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180314/b9dadc37/attachment.html>

Hi, Paul Curtis wrote: > If you read the Arm Architecture document for ARMv5, it states for MUL: > > "Operand restriction: Specifying the same register for <Rd> and <Rm> was > previously described as producing UNPREDICTABLE results. There is no > restriction in ARMv6, and it is believed all relevant ARMv4 and ARMv5 > implementations do not require this

Hi,     I am able to crosscompile llvm-gcc using --with-arch=armv6 but cannot using --with-arch=armv5. Can anyone please tell me what option i should use to crosscIompile for the architecture armv5te (xscale processor). I heard that by default arm 5 code generates, will that work on my target (armv5te)? I get the following when I use --with-arch=armv5 :    

Hi, I was wondering if anyone had managed to get speex to run (nicely) on an IXP425 processor. The current version does not seem to have the necessary optimisations for the ARM v5te, just the v5 which has assembly optimisations not understood by this target. Failing that, does anyone know where I might get a reference for this model of processor? I have look on the Intel site, but I can't

I'm trying to build a very large shared library (bundle) for PPC on Mac OS X 10.5. The build looks something like this, where mybundlebitcode.o is the large object llc -relocation-model=pic -o=mybundle.s mybundlebitcode.o gcc -arch ppc -c -x assembler -o mybundle.o mybundle.s g++ -o mybundle.bundle -bundle mybundle.o -lotherlibrary I get the following error: ld: 32-bit pic-base out of

Hi, Justin PTX version in CUDA 4.0 has changed from 2.2 to 2.3. I add ptx23 subtarget and update a testcase. Is that O.K.? Regards, chenwj -- Wei-Ren Chen (陳韋任) Computer Systems Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667 -------------- next part -------------- Index: test/CodeGen/PTX/options.ll

Might you instead consider just adding a -disable-mmx option? Preston On Thu, 2008-20-11 at 02:57 -0500, Mon Ping Wang wrote: > Hi, > > When setting -mattr option on X86, I would like to treat MMX > separately from SSE levels. This would allow a client who sets the > attributes directly to set the SSE level independent of MMX, e.g., llc > -march=x86 -mattr=sse41, one would get

On Nov 19, 2008, at 11:57 PMPST, Mon Ping Wang wrote: > Hi, > > When setting -mattr option on X86, I would like to treat MMX > separately from SSE levels. This would allow a client who sets the > attributes directly to set the SSE level independent of MMX, e.g., llc > -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while > llc -march=x86 -mattr=mmx

Hi Dale, I will not change the default. I would dislike to see any regressions due to this type of change. -- Mon Ping On Nov 20, 2008, at 10:12 AM, Dale Johannesen wrote: > > On Nov 19, 2008, at 11:57 PMPST, Mon Ping Wang wrote: > >> Hi, >> >> When setting -mattr option on X86, I would like to treat MMX >> separately from SSE levels. This would allow a