similar to: [LLVMdev] ARM AsmLexer

Displaying 20 results from an estimated 800 matches similar to: "[LLVMdev] ARM AsmLexer"

2010 Jun 21
2
[LLVMdev] MC: Object file specific parsing
Hi Daniel, attached is a patch that pushes most of the object file specific parsing out of AsmParser and down into MachOAsmParser. This was done as a cleanup for the ELF work. I know that you're not happy with this approach, particularly the fact that as we add more object file formats and assembler dialects, it's going to cause a class explosion. But I was hoping that we could use this
2014 Nov 12
2
[LLVMdev] Increase the flexibility of the AsmLexer in parsing identifiers.
Hello, I would like to gather some ideas and opinions on how to make the default AsmLexer more flexible when dealing with Identifiers. When the lexer emits something as an "Identifier" (read. String of characters) it means that it needs to be parsed all at once in a single go, even if it contains elements that might be wanted to be parsed as separate entities. In that case it is needed
2012 May 23
0
[LLVMdev] Assembly macros instantiation problem
Hello, I've noticed a following strange behavior: clang-3.2 fails to compile/parse any assembly code that invokes macros which named arguments contains non alphanumeric characters. For example, compilation of the following code snippet would fail with "Parameter not found" error: .macro mov_macro reg_1, reg_2 movl %\reg_1, %\reg_2 .endm mov_macro eax, ebx Although, if one
2014 Mar 11
3
[LLVMdev] GlobalValues appear in their own use lists?
Chris, this is a patch against top-of-tree. Maybe I wrote something wrong in the patch? $ svn info … Last Changed Author: chapuni Last Changed Rev: 203523 Last Changed Date: 2014-03-10 17:34:38 -0700 (Mon, 10 Mar 2014) $ svn diff Index: lib/IR/Verifier.cpp =================================================================== --- lib/IR/Verifier.cpp (revision 203523) +++ lib/IR/Verifier.cpp
2011 Jul 29
0
[LLVMdev] linkage failure
Current llvm svn at r136461 is failing to bootstrap under darwin11 with... cd /sw/src/fink.build/llvm30-3.0-0/llvm-3.0/build/tools/edis && /sw/bin/cmake -E cmake_link_script CMakeFiles/EnhancedDisassembly.dir/link.txt --verbose=1 /sw/var/lib/fink/path-prefix-clang/c++ -fPIC -fno-rtti -O3 -DNDEBUG -shared -L/sw/lib -o ../../lib/libEnhancedDisassembly.dylib -install_name
2010 May 05
0
[LLVMdev] Is the option --enable-shared discontinued in 2.7?
Jeffrey Yasskin wrote: >> Would you try the patch at >> http://codereview.appspot.com/download/issue968046_1.diff? It should >> make the BSDs fall into the same path as Linux, and since you use gnu >> ld, that should work for you. >> > > Ping? > Sorry for the delay. Here is what I am getting after applying the patch: gmake[2]: Leaving directory
2013 Nov 12
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, Thanks for your efforts here. I have a few comments on your patch, although I realise it's still a work in progress. +class ConstantPool { + MCSymbol *Label; + typedef std::vector<const MCExpr*> EntryVecTy; Use a SmallVector here? + MCSymbol *getLabel() {return Label;} + size_t getNumEntries() {return Entries.size();} + const MCExpr *getEntry(size_t Num) {return
2013 Nov 12
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi Amara, Thanks for your suggestions. I have made the changes you suggested and added a new test to check that we print an error when parsing a non-ldr mnemonic with an operand containing `=`. The updated patch is attached. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Amara Emerson
2010 May 05
2
[LLVMdev] Is the option --enable-shared discontinued in 2.7?
On Tue, May 4, 2010 at 5:31 PM, Yuri <yuri at tsoft.com> wrote: > Jeffrey Yasskin wrote: >>> >>> Would you try the patch at >>> http://codereview.appspot.com/download/issue968046_1.diff? It should >>> make the BSDs fall into the same path as Linux, and since you use gnu >>> ld, that should work for you. >>> >> >> Ping?
2018 Sep 28
3
error: expected memory with 32-bit signed offset
Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 
2014 Mar 10
2
[LLVMdev] GlobalValues appear in their own use lists?
In the following IR module: – define i8 @foo() #0 { entry: %call0 = call i8 @bar() ret i8 %call0 } declare i8 @bar() #1 – @bar() gets marked as its own user in top-of-tree LLVM. I patched the Verifier to check it (but didn’t commit the patch): – Index: lib/IR/Verifier.cpp =================================================================== --- lib/IR/Verifier.cpp (revision 203468) +++
2015 Sep 28
2
Parse Instruction
Hi all, in most of the architectures, assembly operands are comma-separated. I would like to parse an assembly code that is space-separated and I am having a bit of problem. In *ParseInstruction* function, I don't know what is the easiest way to figure out how many operands a mnemonic expected to have. In comma-separated assembly code, it just consuming commas (while
2013 Nov 16
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Moving discussion to llvm-commits now that I have a more developed implementation: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20131111/195401. html > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of David Peixotto > Sent: Tuesday, November 12, 2013 11:09 AM > To: 'Amara Emerson' >
2015 Sep 28
3
Parse Instruction
Hi ES, From what I understand instruction parsing is divided into two parts: - Parsing an operand list (XXXAsmParser::ParseInstruction) - Turning the operand list into an actual instruction (XXXAsmParser::MatchAndEmitInstruction) The second part does the validation (e.g. how many operands, what kind, etc) while the first part only does the parsing. That's why I think in the first part
2013 Dec 17
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, Maybe I’m just blind, but where’s the code to handle the .ltorg directive? Is that a separate patch, maybe? Without that, this is not going to be usable in any circumstance using subsections-via-symbols. +typedef std::map<const MCSection *, ConstantPool> ConstantPoolMapTy; This feels odd to me. Can you elaborate a bit more on the data structure choices?? I would have expected
2012 Aug 18
1
[LLVMdev] GlobalVariable initializer using from beyond the grave
For LLDB I'm writing a dumb module pass that removes all global variables, by running the following code: bool erased = true; while (erased) { erased = false; for (Module::global_iterator gi = llvm_module.global_begin(), ge = llvm_module.global_end(); gi != ge; ++gi) { GlobalVariable *global_var =
2020 Nov 02
0
removing 'use_libfts' from dovecot fts_solr config; docs/examples of solr-backend-only tokenizer config for dovecot?
given existing problems with fts_solr = ... use_libfts ... i've rm'd it from dovecot config, and am moving all tokenization to solr config. iiuc, in dovecot + solr context, that's correctly config'd in solr/data/dovecot/conf/schema.xml dovecot release ships with 'starter configs', cp -af /usr/share/doc/dovecot/solr-config-7.7.0.xml
2011 Feb 09
2
[LLVMdev] Building LLVM on Cygwin.
Hi, I followed the build instructions at http://www.aarongray.org/LLVM/BuildingLLVMonCygwin.html to build LLVM and LLVM GCC. Everything went fine except for the 'make install' step of llvm. At this step, I am getting a big list of files which are under /cygdrive/c/llvm-2.8/include/llvm and /cygdrive/c/llvm-2.8/include/llvm-c. The error I am getting is: /usr/bin/install:
2011 Aug 04
1
[LLVMdev] Multiple one-line bugs in LLVM
On Aug 4, 2011, at 9:03 AM, Duncan Sands wrote: >> >> lib/MC/MCParser/AsmLexer.cpp:149 >> while (CurChar != '\n'&& CurChar != '\n'&& CurChar != EOF) >> >> There are identical sub-expressions to the left and to the right of the '&&' >> operator: CurChar != '\n'&& CurChar != '\n'. The
2011 Aug 04
0
[LLVMdev] Multiple one-line bugs in LLVM
Hi Lockal S, > ---- > > lib/Target/X86/X86ISelLowering.cpp:11689 > !DAG.isKnownNeverZero(LHS)&& !DAG.isKnownNeverZero(LHS)) > > Note that there are identical subexpressions '!DAG.isKnownNeverZero (LHS)' to > the left and to the right of the '&&' operator. > The second subexpression should probably be !DAG.isKnownNeverZero(RHS)). a patch