similar to: [LLVMdev] Syntax of 'br', 'switch' and 'indirectbr'

Hi, I want to insert a conditional branch in the middle of a basic block. To that end, I am doing these steps: (1) Split the basic block: bb->splitBasicBlock() (2) Remove the old terminator: succ->removePredecessor(bb) bb->getTerminator()->getParent() (3) Adding a new terminator: BranchInst::Create(ifTrue, ifFalse, cnd, "", bb); That seems to work, but later passes

On May 8, 2009, at 4:02 PM, Nick Johnson wrote: > I want to insert a conditional branch in the middle of a basic block. > To that end, I am doing these steps: > > (1) Split the basic block: > bb->splitBasicBlock() > > (2) Remove the old terminator: > succ->removePredecessor(bb) > bb->getTerminator()->getParent() Assuming that the new block will still be a

John, Thanks for the reply. I agree with your comments that the "Memory" LLVM Spec refers to doesn't include stack. Let me leverage a bit further: If I need to work on high-level IRs (not machine dependent, not in the code-gen stage), is it reasonable to assume that ALL LLVM IRs that have a result field will have potential to write stack? E.g. <result> =

Hello, All, Mac OS 10.6.5 R64 2.11.1 This works as expected: f1 = c(0.084, 0.099, 0) data= data.frame(f1) data$f1=with(data,ifelse(f1==0, 0.0001, f1)) data f1 1 0.0840 2 0.0990 3 0.0001 Substituting ''f1==0'' with ''T'' produces the expected result: f1 = c(0.084, 0.099, 0) data= data.frame(f1) data$f1=with(data,ifelse(T, 0.0001, f1)) data f1 1 1e-04

On Sun, Jul 31, 2011 at 12:49 PM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: > I noticed the patch was already merged into the current LLVM language > reference manual with new memory instructions, fence, cmpxchg and > atomicrmw. Will the instructions be available in LLVM 3.0? Hopefully, yes; the implementation is in progress. -Eli

Another quick question. In ./bindings/ocaml/Makefile.ocaml, the configurations when ENABLE_OPTIMIZED<>1 are commented, which set -g flag to $(OCAMLC). Is that for back-compatibility to support OCaml < 3.10.0? On Sun, Feb 28, 2010 at 6:48 PM, Erick Tryzelaar <idadesub at users.sourceforge.net> wrote: > On Sun, Feb 28, 2010 at 8:38 AM, Jianzhou Zhao <jianzhou at

On Sun, Jul 31, 2011 at 7:12 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Sun, Jul 31, 2011 at 12:49 PM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> I noticed the patch was already merged into the current LLVM language >> reference manual with new memory instructions, fence, cmpxchg and >> atomicrmw. Will the instructions be available in LLVM

On Mon, Aug 22, 2011 at 3:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>>> In

On Thu, Nov 11, 2010 at 8:28 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: > Hi all, > > http://www.llvm.org/docs/ProgrammersManual.html#BuildRecType suggests > us to define recursive types via opaque and refine. Since LLVM has > structural types, %rt = type { %rt* } and %rt1 = type { %rt* } should > be same structurally. I tested the following code, > > %rt =

Hello, I have a question about the indirectbr instruction. I attempted to use it according to the example in the Assembly Language Reference manual, but got an "expected instruction opcode" error. Poking about on the web I found this document: http://nondot.org/sabre/LLVMNotes/IndirectGoto.txt which appears to be a Nov 2, 2009 proposal to add indirectbr and blockaddress() to the IR

Hi, I encountered an error while trying to use the indirectbr instruction with Alpha backend (current build). Here's part of the code sequence that I tried to compile: bb1: %1 = load i32* %i, align 4 %2 = add nsw i32 %1, 1 store i32 %2, i32* %i, align 4 indirectbr i8* blockaddress(@main, %bb1), [ label %bb1 ] br label %return This compiles correctly when I use the X86 or PPC

On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: > On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>> In the definition of 'monotonic' ordering, >>> ... "If an address is written

On Jan 2, 2010, at 11:03 AM, Dustin Laurence wrote: > Hello, > > I have a question about the indirectbr instruction. I attempted to > use > it according to the example in the Assembly Language Reference manual, > but got an "expected instruction opcode" error. Poking about on the > web > I found this document: > >

Hello, I have a question about the indirectbr instruction. I attempted to use it according to the example in the Assembly Language Reference manual, but got an "expected instruction opcode" error. Poking about on the web I found this document: http://nondot.org/sabre/LLVMNotes/IndirectGoto.txt which appears to be a Nov 2, 2009 proposal to add indirectbr and blockaddress() to the IR

On Mon, Aug 22, 2011 at 3:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>>> In

Hi, How does the requirement that phi instructions have one value per predecessor basic block interact with indirectbr instructions? For instance, take the following code: L1: br i1 %somevalue, label %L2, label %L3 L2: %ret1 = i8* blockaddress(@myfunction, %L5) br label %L4 L3: %ret2 = i8* blockaddress(@myfunction, %L6) br label %L4 L4: %ret = phi i8* [%ret1, L2], [%ret2, L3]

Thank you for the suggestion, Bill. The result is not quite what I would like. Here's sample code for you or anyone else who may be interested: Al1 = c('A','C','C','C') Al2 = c('G','G','G','T') Freq1 = c(0.0078,0.0567,0.9434,0.9908) MAF = c(0.0078,0.0567,0.0566,0.0092) m1 = data.frame(Al1=Al1,

On Wed, Jan 4, 2012 at 12:10 PM, David Gardner <daveg at xmos.com> wrote: > Jianzhou Zhao <jianzhou <at> seas.upenn.edu> writes: >> The documents say that all the aa analysis are chained, and give an >> example like opt -basicaa -ds-aa -licm. In this case, does ds-aa >> automatically call basicaa for the case when ds-aa can only return >> MayAlias? This

On Sun, Jul 31, 2011 at 7:11 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Sun, Jul 31, 2011 at 3:04 PM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> The current memory model section ends with the following discussions: >> >> "Note that in cases where none of the atomic intrinsics are used, this >> model places only one restriction on

Hi, I am wondering if there is any convenient way to comment out an entire region of a Sweave file which comprises R and Latex code. Currently I'm doing it for the R and Latex parts separately or transfer the unwanted part into a different file. But both are not great solutions. (I am doing this when updating old files and debugging) Is there a way to do this with an equivalent of