similar to: [LLVMdev] C code generation from LLVM IR

Displaying 20 results from an estimated 30000 matches similar to: "[LLVMdev] C code generation from LLVM IR"

2010 Jan 29
0
[LLVMdev] C code generation from LLVM IR
Found it in 2.6 release note. It is no longer considered as release criteria and no more maintenance on this. Bengu On Fri, Jan 29, 2010 at 11:55 AM, Bengu Li <libengu at gmail.com> wrote: > Hello, > > Does anybody know whether the functionality of generating C code from LLVM > IR is still available? > As described in the document of getting started with VS, to compile IR
2010 Jan 28
4
[LLVMdev] llc generated machine assembly code for NASM
Thanks for Anton's reply. Does anybody have an idea of roughly how much effort is required to make intel asm printer to be usable? If it is within weeks, probably I can give it a try. Thanks, Bengu On Thu, Jan 28, 2010 at 12:18 AM, Anton Korobeynikov < anton at korobeynikov.info> wrote: > Hello > > > system native assemlber and linker to generate executables. And it >
2010 Jan 28
2
[LLVMdev] llc generated machine assembly code for NASM
Hello, I am new here. This is my first post. I spent about three days on trying out LLVM by developing a front-end which is able to generate LLVM IR for a subset of C language. I have not applied any optimization pass yet. On linux, it can go all the way through with the system native assemlber and linker to generate executables. And it runs. I ran into problems on Windows since the generated
2010 Jan 28
0
[LLVMdev] llc generated machine assembly code for NASM
Hello > Does anybody have an idea of roughly how much effort is required to make > intel asm printer to be usable? If it is within weeks, probably I can give > it a try. The required efforts equal to ones required to write new assembler. "Too weak to be usable" means "it's not possible to represent many important constructs with masm/nasm/fasm". -- With best
2005 Sep 17
1
[LLVMdev] Subword register allocation
Hi, I have a question about implementing subword register allocation problems (see the REFERENCES in the end of this message) on LLVM. I have algorithms, but don't know the best way to implement them in LLVM. I asked similar question before: http://lists.cs.uiuc.edu/pipermail/llvmdev/2005- May/004001.html Because I still don't have a satisfying solution now, I try to elaborate it
2010 Jan 28
0
[LLVMdev] llc generated machine assembly code for NASM
Hello > system native assemlber and linker to generate executables. And it runs. I > ran into problems on Windows since the generated assembly code is not able > to be assembled by NASM. That's correct. Use AT&T asm printer and GNU as everywhere. Everything else is too weak to be usable and thus one should consider intel asm printer to be of "listing quality". -- With
2010 Feb 03
1
[LLVMdev] llc generated machine assembly code for NASM
>> I am sure that you've run into many problems when efforts were carried out >> to implement the Intel ASM printer between version 1.6 and 1.7. I'd >> appreciated it if you could point me to any document with regard to relavent >> problems at that time. > I don't have such document. > Just grab some non-trivial c++ app (with several source files) and try
2010 Jan 28
1
[LLVMdev] llc generated machine assembly code for NASM
Could you give me some examples of such constructs that are not possible to represent with MASM/NASM/FASM but are able to represent with gas? Thanks, Bengu On Thu, Jan 28, 2010 at 11:41 AM, Anton Korobeynikov < anton at korobeynikov.info> wrote: > Hello > > > Does anybody have an idea of roughly how much effort is required to make > > intel asm printer to be usable? If
2010 Feb 03
2
[LLVMdev] llc generated machine assembly code for NASM
Hi, Anton, For a simple example, I took the machine assembly code generated by llc and with a little manual change on the assebmly code (the way how llc generates .text segment is not accepted by MASM), it is able to be assembled and linked by MASM. And it runs. Haven't tried it on NASM yet. I am sure that you've run into many problems when efforts were carried out to implement the
2012 May 08
2
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
Tobias Grosser <tobias at grosser.es> writes: > The very same should work for Pure, dragonegg and basically any > compiler based on LLVM. So I do not want to change clang at all > (except of possibly linking to -lcuda). Why is this a requirement? I think it's completely unrealistic to expect to be able to do this without driver changes. If you don't want to change clang,
2012 May 09
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
On 05/08/2012 09:15 PM, dag at cray.com wrote: > Tobias Grosser<tobias at grosser.es> writes: > >> The very same should work for Pure, dragonegg and basically any >> compiler based on LLVM. So I do not want to change clang at all >> (except of possibly linking to -lcuda). > > Why is this a requirement? I think it's completely unrealistic to > expect to
2019 Jun 20
2
[PATCH 05/22] mm: export alloc_pages_vma
On Thu 13-06-19 11:43:08, Christoph Hellwig wrote: > noveau is currently using this through an odd hmm wrapper, and I plan > to switch it to the real thing later in this series. > > Signed-off-by: Christoph Hellwig <hch at lst.de> > --- > mm/mempolicy.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/mm/mempolicy.c b/mm/mempolicy.c > index
2012 Jul 16
0
[LLVMdev] [llvm-commits] RFC: LLVM incubation, or requirements for committing new backends
On Mon, Jul 16, 2012 at 11:44:25AM -0700, Owen Anderson wrote: > Tom, > > I think it might be productive to fork this thread to discuss making the requirements for upstreaming a new LLVM target more explicit and open. I'd also like to gauge interest in an idea I've discussed privately with a few community members, namely the concept of having a semi-official
2019 Oct 31
5
RFC: On non 8-bit bytes and the target for it
On Wed, 2019-10-30 at 15:30 -0700, Chris Lattner via llvm-dev wrote: > > On Oct 30, 2019, at 3:07 AM, Jeroen Dobbelaere via llvm-dev < > > llvm-dev at lists.llvm.org> wrote: > > > > > From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of JF > > > Bastien via > > > > [..] > > > Is it relevant to any modern compiler
2019 Jun 25
2
[PATCH 05/22] mm: export alloc_pages_vma
On Mon, Jun 24, 2019 at 11:24:48AM -0700, Dan Williams wrote: > I asked for this simply because it was not exported historically. In > general I want to establish explicit export-type criteria so the > community can spend less time debating when to use EXPORT_SYMBOL_GPL > [1]. > > The thought in this instance is that it is not historically exported > to modules and it is
2013 Oct 08
2
[LLVMdev] C constructs to generate some of LLVM IR instructions?
Hi, I was studying the LLVM IR instruction set by analyzing how constructs in C language is getting converted to IR form. I found difficulty in finding C constructs which could generate Invoke, Resume, Unreachable, ExtractValue, InsertValue instructions. Can someone help me find some simple C code that generates these instructions in LLVM IR? -- Regards, Rekha -------------- next part
2005 May 18
2
R -SQL
Hello, I've got a problem in a sql query! for(j in 1:length(criteria$Title)) { graphe_par<-sqlQuery(channel,"select q.type,crit.Title, r.Value from criteria crit, reply r,question_reply qr, question q, question_criteria qc, form_question fq where qr.reply=r.ID and qr.question=q.ID and qc.question=q.ID and crit.ID=qc.criteria and fq.question=q.ID and fq.form=4 and
2006 May 25
24
Make these a prt of Ruby on Rails!
3 things that should be part of the main Rails tree: http://www.redhillconsulting.com.au/rails_plugins.html Views? -- Posted via http://www.ruby-forum.com/.
2006 May 03
6
Versioning the contents of a table as a set
I am looking at using acts_as_versioned to manage revisions of data in several tables in my application. However, the default behavior of acts_as_versioned appears to apply to individual rows within a table. The tables I want to version are complicated lookup tables and what I really want is to version the entire contents of each table as a single set. Adding a row, deleting a row, or updating
2012 Mar 01
2
'break' function in loop
Dear R helpers, I have some difficulties in using ''break'' function with loop, and the followings are my script. What I try to do is (1) permute ''or'' first; (2) doing t-test if this ''or'' pass criteria 1 (k=1); (3) end the loop when I get 10 permutations; (4) redo everything again but this time use criteria 2 (k=2) (I have more criteria 1:n).