similar to: [LLVMdev] Frame index arithmetic

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] Frame index arithmetic"

2010 Jan 18
0
[LLVMdev] Frame index arithmetic
On Jan 17, 2010, at 2:56 AM, Mark Muir wrote: > I've developed a working back-end for a custom architecture, based on LLVM 2.6. I'm now trying to cover more of the unique features of this architecture. > > To make use of one such feature, I'm trying something cunning/crazy with the stack - implementing it in a type of memory that can only be addressed via immediates. >
2010 Jan 19
2
[LLVMdev] Frame index arithmetic
>> I'm trying something cunning/crazy with the stack - implementing it in a type of memory that can only be addressed via immediates. >> >> I've got this mostly working. However, I came across a problem which I've been unable to work around: lowering the IR (even without any optimisations enabled) often requires the pattern: >> >> i32 = FrameIndex
2017 Jul 24
5
Ifelse statements and combining columns
Hi everyone, I'm having some trouble with my ifelse statements. I'm trying to put 12 conditions within 3 groups. Here is the code I have so far: dat$cond <- ifelse(test = dat$cond == "cond1" | dat$cond == "cond2" | dat$cond == "cond3" dat$cond == "cond4" yes = "Uniform" no = ifelse(test =
2016 Dec 02
4
Is the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 legal?
Hi, The phase of instruction combine cannot handle the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 generated by the phase of CFG simplification and the compiler generates an assertion failure. I wonder whether this is valid LLVM IR: %4 = select i1 %tobool.i, metadata !12, metadata !10 Before CFGSimplify cond.true.i: ; preds = %entry
2008 Sep 05
0
[LLVMdev] missed optimizations
On Thu, Sep 4, 2008 at 8:39 AM, Nuno Lopes <nunoplopes at sapo.pt> wrote: > Hi, > > I have two questions about optimizations performed by llvm. > > Consider these simple functions: > int x(int b) { return b?4:6; } > int y() { return x(0); } > > int x2() { return 5; } > int y2() { return x2(); } > > the optimized bitcode (with clang + opt
2016 Dec 02
2
Is the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 legal?
To reproduce the issue, please use the command line "opt -simplifycfg filename". target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.G = type { %struct.ordered_index_node*, i32 } %struct.ordered_index_node = type { %struct.B, %struct.F } %struct.B = type { i32 } %struct.F = type { i32*, i32* }
2008 Sep 04
5
[LLVMdev] missed optimizations
Hi, I have two questions about optimizations performed by llvm. Consider these simple functions: int x(int b) { return b?4:6; } int y() { return x(0); } int x2() { return 5; } int y2() { return x2(); } the optimized bitcode (with clang + opt -std-compiler-opts) is: define i32 @y(...) nounwind { entry: ret i32 6 } define i32 @y2(...) nounwind { entry: %call = call i32 (...)* @x2( ) ;
2011 Dec 27
2
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
Hi! before InstCombine (llvm::createInstructionCombiningPass()) I have a trunc from i8 to i1 and then a select: %45 = load i8* @myGlobal, align 1 %tobool = trunc i8 %45 to i1 %cond = select i1 %tobool, float 1.000000e+00, float -1.000000e+00 after instCombine I have: %29 = load i8* @myGlobal, align 1 %30 = and i8 %29, 1 %tobool = icmp ne i8 %30, 0 %cond = select i1 %tobool, float 1.000000e+00,
2017 Jul 24
0
Ifelse statements and combining columns
Not a reproducible example, so a bit of guessing here, but a) don't try to assign results to variables inside the ifelse. That is, remove all the single-equals signs and "test" variables. If you really need to conditionally assign variables then use "if"... but chances are good you don't need that. b) "closure" is effectively another word
2009 Aug 24
4
Is there a fast way to do several hundred thousand ANOVA tests?
Dear R users, I have a matrix a and a classification vector b such that > str(a) num [1:50, 1:800000] and > str(b) Factor w/ 3 levels "cond1","cond2","cond3" I'd like to do an anova on all 800000 columns and record the F statistic for each test; I currently do this using f.stat.vec <- numeric(length(a[1,]) for (i in 1:length(a[1,]) { f.test.frame
2016 Jun 22
2
LLVM Backend Issues
Thanks Anton and Krzysztof! Here is the dump using the -debug flag. At this point I am not making much sense of this, would it be too much to ask if one of you could walk me through one of these lines? One thing that I didn't point out is that I never defined any separate floating point registers, not sure if this will pose any issue? Thanks again for your time! Jeff jeff at
2011 Dec 28
3
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
>> Hi! >> >> before InstCombine (llvm::createInstructionCombiningPass()) I have >> a trunc from i8 to i1 and then a select: >> >> %45 = load i8* @myGlobal, align 1 >> %tobool = trunc i8 %45 to i1 >> %cond = select i1 %tobool, float 1.000000e+00, float -1.000000e+00 >> >> after instCombine I have: >> >> %29 = load i8*
2016 Jun 21
3
LLVM Backend Issues
Hi, I am having issues running a new backend that I created for a new architecture. I suspect these errors may have something to do with how I have the string setup in LLVMTargetMachine() below? Also - It would be great if someone could point me to a document that describes some of these error messages? For example what does t26 ..t4 mean? Thanks in advance for taking your valuable time to help
2011 Dec 28
0
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
On Dec 27, 2011, at 5:09 AM, Jochen Wilhelmy wrote: > Hi! > > before InstCombine (llvm::createInstructionCombiningPass()) I have > a trunc from i8 to i1 and then a select: > > %45 = load i8* @myGlobal, align 1 > %tobool = trunc i8 %45 to i1 > %cond = select i1 %tobool, float 1.000000e+00, float -1.000000e+00 > > after instCombine I have: > > %29 = load i8*
2016 Jan 29
3
New register class and patterns
On Fri, Jan 29, 2016 at 10:22 AM, Krzysztof Parzyszek via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 1/28/2016 8:11 PM, Rail Shafigulin via llvm-dev wrote: > >> >> Would anyone be able to figure out why this is happening? I can provide >> more code if needed. >> > > The error message should show what types have been inferred so far. > > You
2016 Feb 11
3
Expected constant simplification not happening
Hi the appended IR code does not optimize to my liking :) this is the interesting part in x86_64, that got produced via clang -Os: --- movq -16(%r12), %rax movl -4(%rax), %ecx andl $2298949, %ecx ## imm = 0x231445 cmpq $2298949, (%rax,%rcx) ## imm = 0x231445 leaq 8(%rax,%rcx), %rax cmovneq %r15, %rax movl $2298949, %esi ## imm = 0x231445 movq %r12, %rdi movq %r14,
2015 Jan 28
15
[LLVMdev] RFC: Proposal for Poison Semantics
Hello, What follows is my attempt to describe how poison works. Let me know what you think. -- David # LLVM Poison Semantics Poison is an LLVM concept which exists solely to enable further optimization of LLVM IR. The exact behavior of poison has been, to say the least, confusing for users, researchers and engineers working with LLVM. This document hopes to clear up some of the confusion
2011 Dec 29
0
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
I think Chris is saying that the and is necessary because with your i1 trunc you're ignoring all of the high bits. The and implements that. If you don't want this behavior, don't generate the trunc in the first place and just compare the full width to zero. Reid On Wed, Dec 28, 2011 at 6:45 AM, Jochen Wilhelmy <j.wilhelmy at arcor.de>wrote: > > >> Hi! >
2015 Jul 29
2
[LLVMdev] optimizer clobber EFLAGS
Using Clang/LLVM 3.6.0 we are observing a case where the optimizations are clobbering EFLAGS on x86_64. This is inconvenient when the status of bit 9 (IF), which controls interrupts, changes. Here's a simple test program. Assume that the external function foo() modifies the IF bit in EFLAGS. --- #include <stdlib.h> #include <stdbool.h> void foo(void); int a; int bar(void)
2016 Jan 30
1
New register class and patterns
> On Jan 29, 2016, at 13:25, Rail Shafigulin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > I think I understand it. But looks like I have everything labelled properly. Maybe I missed something. Here are more details: > > defm SFEQ : SF<0x0, "l.sfeq", Escala_CC_EQ>; > > multiclass SF<bits<5> op2Val, string asmstr, PatLeaf