similar to: [LLVMdev] LICM ilist question.

Displaying 20 results from an estimated 8000 matches similar to: "[LLVMdev] LICM ilist question."

2010 Jan 11
0
[LLVMdev] LICM ilist question.
I am using LLVM 2.6 and I have a question on the use of the BasicBlock::iterator to hoist loop invariant instructions to the loop preheader. When I process the instructions backward as shown in the following code, I got the following error right after the "hoist(I)" is done. Can anyone advise whether I am misusing BasicBlock::iterator? /opt/llvms/src/llvm_26/
2011 Feb 07
3
[LLVMdev] A question about LICM (Loop Invariant Code Motion)
Hi, I recently looked into the LICM(Loop Invariant Code Motion) pass of LLVM and got a question about hoist load instruction to loop preheader. I would like to show two examples: Example 1: int func(int n, int *fp) { int i; int a[1000]; for (i = 0; i < n; ++i) { a[i] += *fp; // load from *fp pointer, no hoist } } Here, load *fp CAN NOT be hoisted to loop preheader. If replace *fp
2012 Mar 08
1
[LLVMdev] "Machine LICM" for Constants?
Thanks for the tip! I looked into it and it looks like the problem as of SVN HEAD is that the lui and ori instructions in Mips are considered cheap (1-cycle def-use latency) by MachineLICM::IsCheapInstruction(), but are not trivially materializable because their register operands are not always available. This makes MachineLICM::IsProfitableToHoist() return false, preventing the hoist even
2012 Mar 07
0
[LLVMdev] "Machine LICM" for Constants?
Yes machine-licm can and should hoist constant materialization instructions out of the loop. If it's not doing that, it's probably because the target is not modeling the instruction correctly. I would walk through MachineLICM::IsLoopInvariantInst() in the debugger to figure it out. You can also try compiling the same bitcode for a target like ARM or X86 as a comparison. Evan On Mar 7,
2016 Dec 27
1
Question regarding LICM
Hello, I am working on a C++ expression templates based DSL where we are using LLVM for the code generation. I needed some help in understanding the behaviour of the LICM pass. In the following example code the "A" class is a custom container that defines various arithmetic operators using expression templates. We are defining three arrays of the "A" container and aggregating
2017 Apr 26
1
Function LICM for readonly, nocapture functions
Hey all, I was doing some investigation of LICM and I ran into something that seems a bit odd to me. Suppose I was looking at the following code snippet: #define N 1000 int main() { int B[N]; char A[N]; for(int i=0; i<N; i++) { B[i] = strlen(A); } return B[0]+B[N-1]; } Among other optimizations that I may want to happen, I'd hope that the call to strlen could be
2012 Mar 07
2
[LLVMdev] "Machine LICM" for Constants?
Hi All, I work on a backend for a target similar to Mips, where large immediates are loaded into registers with 2 instructions, 1 to load the MSBits and 1 to load the LSBits. I've noticed a recurring pattern where, despite low register pressure, these constants will be rematerialized in every iteration of a loop, rather than being hoisted. Here's an example using the
2010 Nov 17
1
[LLVMdev] L->isLoopInvariant giving wrong results?
my changed code. namespace { class MyLoopPass:public LoopPass { bool changed; public: static char ID; Loop* curLoop; // AnalysisType* AA; DominatorTree* DT; LoopInfo* LI; MyLoopPass() : LoopPass(ID){} bool isLoopInvariantInst(Instruction &I) ; bool runOnLoop(Loop * L, LPPassManager &lpm); virtual void getAnalysisUsage(AnalysisUsage &AU) const {
2012 Sep 09
1
[LLVMdev] isSafeToSpeculativelyExecute() for CallInst
Hi Nadav, On 08/09/12 22:51, Nadav Rotem wrote: > > On Aug 19, 2012, at 2:55 PM, "Kuperstein, Michael M" > <michael.m.kuperstein at intel.com <mailto:michael.m.kuperstein at intel.com>> wrote: > >> Hello, >> Currently, llvm::isSafeToSpeculativelyExecute() always returns false for Call >> instructions. >> This has actual performance
2012 Sep 08
0
[LLVMdev] isSafeToSpeculativelyExecute() for CallInst
On Aug 19, 2012, at 2:55 PM, "Kuperstein, Michael M" <michael.m.kuperstein at intel.com> wrote: > Hello, > > Currently, llvm::isSafeToSpeculativelyExecute() always returns false for Call instructions. > This has actual performance implications, because loop-invariant code motion makes this check, and will never hoist instructions that are not safe to speculatively
2011 Oct 07
1
[LLVMdev] MIPS 32bit code generation
I don't think I ever said that the MIPS target is broken. I am simply trying to branch out one additional llc target for SimpleScalar PISA architecture. On Fri, Oct 7, 2011 at 2:41 PM, Jim Grosbach <grosbach at apple.com> wrote: > I reiterate. You should fix the simulator. It is broken. The compiler is > not. Fix what's broken. > > -Jim > > On Oct 7, 2011, at 1:11
2011 Oct 07
0
[LLVMdev] MIPS 32bit code generation
I reiterate. You should fix the simulator. It is broken. The compiler is not. Fix what's broken. -Jim On Oct 7, 2011, at 1:11 PM, Gang-Ryung Uh wrote: > Hi, > > I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, > > > > On Thu, Oct 6, 2011 at
2011 Oct 07
2
[LLVMdev] MIPS 32bit code generation
Hi, I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, On Thu, Oct 6, 2011 at 11:29 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Do you want to replace > > lui $2, %hi(g1) > addiu $2, $2, %lo(g1) > > with this? > la $2, g1 > > If that
2017 Feb 21
2
Error at Pre-regalloc Machine LICM: "getVRegDef assumes a single definition or no definition"' failed.
Hello. Does anybody have an idea why I'm getting the error below when using llc with arguments -O1 -disable-cgp? Note that this error is not given when using llc -O0. (I'd like to mention also I'm using custom Instruction selection for BUILD_VECTOR, which gets converted in my back end's machine instrution VLOAD_D, although the custom code seems to always select
2015 Feb 11
3
[LLVMdev] question about licm
----- Original Message ----- > From: "Ashutosh Nema" <Ashutosh.Nema at amd.com> > To: "songlh" <songlh at cs.wisc.edu>, llvmdev at cs.uiuc.edu > Sent: Wednesday, February 11, 2015 3:20:27 AM > Subject: Re: [LLVMdev] question about licm > > Hi, > > LICM can only hoist instructions which dominates all loop exit > blocks. > In this case
2015 Apr 27
4
[LLVMdev] alias set collapse and LICM
I'm current facing an issue related to AliasSetTracker/LICM: the transitive closure of the alias sets is materially more conservative than individual aliasing queries and this conservatism leads to generally worse optimization in LICM. For instance, consider this module: declare i32 @only_reads() readonly declare void @escape(i32*, i32*, i32*) define void @f(i32 %count) { entry: %a =
2011 Oct 06
1
[LLVMdev] MIPS 32bit code generation
Hi, for our micro-architecture research, we are using simplescalar 3.0 32bit mips simulator, which comes with binutils 1.5.2, and the ld fails at "lui" (bfd error). However, the ld is happy with "la" (assembler macro) and simulator correctly simulates. On Wed, Oct 5, 2011 at 5:04 PM, Eric Christopher <echristo at apple.com> wrote: > > On Oct 5, 2011, at 4:01 PM,
2009 Oct 27
2
[LLVMdev] LICM
Hi all, I just noticed that LICM does not hoist/sink the following store out of the loop: int array[20]; int i; for (i = 0; i<100; i++) { array [0] = 0; } The getElementPtr instruction is hoisted out of the loop; the store is not. Did I miss something obvious? Bitcode file attached. Generated using LLVM 2.5 and llvm-gcc -c -emit-llvm
2016 Apr 20
2
[LICM][MemorySSA] Converting LICM pass to use MemorySSA to avoid AliasSet collapse issue
Hi Daniel, Thanks for the info. I’ve started looking into converting EarlyCSE to use MemorySSA first since 1) I don’t think it needs any additional MemorySSA update API and 2) the particular case I’m looking at needs EarlyCSE to catch more load cases before LICM to be profitable. I have a prototype working, but have run into two issues: 1) readonly calls are treated as clobbers by
2011 Jul 19
8
[LLVMdev] Reviving the new LLVM concurrency model
There was some discussion a while back about adding a C++0x-style memory model and atomics for LLVM a while back (http://thread.gmane.org/gmane.comp.compilers.llvm.devel/31295), but it got stalled. I'm going to try and restart progress on it. Attached are two patches; the first adds a section to LangRef with just the memory model, without directly changing the documentation or implementation