similar to: [LLVMdev] 'Address of Label and Indirect Branches in LLVM IR' blog post

Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] 'Address of Label and Indirect Branches in LLVM IR' blog post"

2010 Jan 03
0
[LLVMdev] 'Address of Label and Indirect Branches in LLVM IR' blog post
On 2010-01-03 10:33, Chris Lattner wrote: > If you're interested in this new extension, here is some more information with some less-than-obvious aspects of the design: > http://blog.llvm.org/2010/01/address-of-label-and-indirect-branches.html > > This feature was added to LLVM by Bob Wilson, Dan Gohman and I to mainline back in November. If you have questions or comments about
2010 Jan 03
1
[LLVMdev] 'Address of Label and Indirect Branches in LLVM IR' blog post
2010/1/3 Török Edwin <edwintorok at gmail.com>: > On 2010-01-03 10:33, Chris Lattner wrote: >> If you're interested in this new extension, here is some more information with some less-than-obvious aspects of the design: >> http://blog.llvm.org/2010/01/address-of-label-and-indirect-branches.html >> >> This feature was added to LLVM by Bob Wilson, Dan Gohman and
2010 Jan 02
3
[LLVMdev] indirectbr
Hello, I have a question about the indirectbr instruction. I attempted to use it according to the example in the Assembly Language Reference manual, but got an "expected instruction opcode" error. Poking about on the web I found this document: http://nondot.org/sabre/LLVMNotes/IndirectGoto.txt which appears to be a Nov 2, 2009 proposal to add indirectbr and blockaddress() to the IR
2008 Jul 24
0
[LLVMdev] Indirect Branch Representation
On Jul 23, 2008, at 8:47 PM, kapil anand wrote: > > Specifically, I need a way to represent indirect branch instruction > (in binary) as an equivalent LLVM instruction. With switch > instruction , I would have to list all the possible targets and then > initialize the corresponding instruction. I was just thinking > whether it might be possible to have some kind of
2008 Jul 24
5
[LLVMdev] Indirect Branch Representation
Specifically, I need a way to represent indirect branch instruction (in binary) as an equivalent LLVM instruction. With switch instruction , I would have to list all the possible targets and then initialize the corresponding instruction. I was just thinking whether it might be possible to have some kind of indirect branch where label is a "variable" and not an explicit label present in
2008 Jul 24
2
[LLVMdev] Indirect Branch Representation
So, that means that &&(Label) operator, which is defined in C++, is also not supported currently in LLVM. I thought I could obtain address of basic block indirectly through this small hack but it does not seem to work. Actually, I tried to make folloing dummy C++ code which uses this operator: *int main(int argc,char** argv) { int x; int y; L1:
2019 Nov 05
2
Seeking clarification about indirect critical edges
Hello all! (I apologize if I've ended up in the wrong list!) I'm trying to get a better understanding of LLVM's critical edge splitting, as documented in `Transforms/Utils/BasicBlockUtils.h`; specifically in the case of critical edges which are indirect transfer. The code comments discuss the following example: a CFG with direct edges A->D, B->D, and an indirect critical edge
2019 Nov 06
2
Seeking clarification about indirect critical edges
That makes way more sense, thank you so much! >From your description it sounds like you were assuming that “D1”, rather > than “D0B”, is the original block “D”. In the source, “D1” is “BodyBlock” > and “D”/”D0”/”D0B” are “Target” (and “D0A” is “DirectSucc”). > I’d guess that the “easy cases” remark corresponds to bailing out on EH > pads. Yeah I could see how exception handling
2010 Mar 30
2
[LLVMdev] [cfe-dev] 2.7 Pre-release1 available for testing
On 03/30/2010 09:15 PM, Tanya Lattner wrote: > > Thanks for testing the release! > >> Tests were run on x86-64, Debian unstable, Linux 2.6.33, gcc 4.4.3, >> 64-bit. I built srcdir == objdir, I have built llvm and clang myself, >> and used the binaries for llvm-gcc. >> >> 1. llvm-gcc 2.7 vs 2.6 >> compared to my results from Aug 31 2009, ignoring CBE
2010 Dec 11
3
[LLVMdev] indirectbr/blockaddress question
In my llvm jit project I needed to lookup BB addresses at execution time and then jump to the corresponding BB. A C++ routine called at runtime from IR finds the right BB, gets its BlockAddress and returns it as an i8*. The IR does an indirectbr on this value... Well, not really. The routine returns the address of a BlockAddress node. Is there any way to get the real runtime code address for the
2010 Mar 15
3
[LLVMdev] LLVM tries to remove labels used in blockaddress()
Hi, i ran into a problem when using blockaddress() with a label in another function. It seems to me that LLVM tries to remove the label used in blockaddress because it seems like it is not used, but in fact it may be used somewhere with a indirectbr. I attached a small test-case that produces this error. (The original problem is much more complicated, so i hope the reduced example, which has no
2010 Mar 15
0
[LLVMdev] LLVM tries to remove labels used in blockaddress()
On Mar 15, 2010, at 7:11 AM, Sebastian Schlunke wrote: > Hi, > > i ran into a problem when using blockaddress() with a label in another function. It seems to me that LLVM tries to remove the label used in blockaddress because it seems like it is not used, but in fact it may be used somewhere with a indirectbr. > > I attached a small test-case that produces this error. (The
2010 Mar 15
3
[LLVMdev] LLVM tries to remove labels used in blockaddress()
I see. But the block does not necessarily contain dead code. My original problem is more like this: define i32 @main() { entry: %target = bitcast i8* blockaddress(@test_fun, %test_label) to i8* call i32 @test_fun(i8* %target) ret i32 0 } define i32 @test_fun(i8* %target) { entry: indirectbr i8* %target, [label %test_label] test_label: ; assume some code here... br label %ret ret: ret
2010 Aug 02
2
[LLVMdev] indirectbr and phi instructions
Hi, How does the requirement that phi instructions have one value per predecessor basic block interact with indirectbr instructions? For instance, take the following code: L1: br i1 %somevalue, label %L2, label %L3 L2: %ret1 = i8* blockaddress(@myfunction, %L5) br label %L4 L3: %ret2 = i8* blockaddress(@myfunction, %L6) br label %L4 L4: %ret = phi i8* [%ret1, L2], [%ret2, L3]
2011 Aug 02
0
[LLVMdev] Multiple successors, single dynamic successor
Nella citazione martedì 2 agosto 2011 22:01:13, Carlo Alberto Ferraris ha scritto: > My question is: > what is the best way to > express such relationships in LLVM IR ("best" in the sense of allowing > other optimizations to run effectively)? Bear in mind that in this > example N=2, but it may be way bigger than that. Just to clarify: I already figured out two ways to
2015 Feb 12
2
[LLVMdev] RFC: Native Windows C++ exception handling
> We'd have to hoist a + b to somewhere that dominates L1 and L2. I think the only BB in your program that dominates is the entry block I don't follow. What path do you see from entry to either L1 or L2 that doesn't pass through the indirectbr? In order to reach either L1 or L2, the call to maybe_throw() must raise an exception (else we'd return 0 from foo), the exception must
2011 Mar 31
1
[LLVMdev] indirectbr implementation for Alpha backend
Hi, I encountered an error while trying to use the indirectbr instruction with Alpha backend (current build). Here's part of the code sequence that I tried to compile: bb1: %1 = load i32* %i, align 4 %2 = add nsw i32 %1, 1 store i32 %2, i32* %i, align 4 indirectbr i8* blockaddress(@main, %bb1), [ label %bb1 ] br label %return This compiles correctly when I use the X86 or PPC
2011 Jul 08
4
[LLVMdev] Missed optimization with indirectbr terminator
Nella citazione giovedì 7 luglio 2011 19:41:16, John McCall ha scritto: > On Jul 7, 2011, at 4:33 AM, Carlo Alberto Ferraris wrote: >> Il 07/07/2011 11:14, Cameron Zwarich ha scritto: >>> I haven't read the code in detail, but it looks like JumpThreading at >>> least attempts to thread across indirect branches. You can either try >>> to fix it or file a
2010 Apr 05
0
[LLVMdev] [cfe-dev] 2.7 Pre-release1 available for testing
On 03/30/2010 09:21 PM, Török Edwin wrote: > On 03/30/2010 09:15 PM, Tanya Lattner wrote: >> Thanks for testing the release! >> >>> Tests were run on x86-64, Debian unstable, Linux 2.6.33, gcc 4.4.3, >>> 64-bit. I built srcdir == objdir, I have built llvm and clang myself, >>> and used the binaries for llvm-gcc. >>> >>> 1. llvm-gcc 2.7 vs
2012 Dec 03
2
[LLVMdev] [RFC] "noclone" function attribute
Hi, Thanks for the pointers. My patch now calls the attribute "noduplicate", and updates CodeMetrics to have another field: bool notDuplicatable; Which semantically is "containsIndirectBr || containsNoDuplicateInst". I didn't repurpose containsIndirectBr because I felt what I'm looking for is sufficiently different (indirectbr inhibits inlining, whereas noduplicate