similar to: [LLVMdev] patch for portability

On Dec 2, 2009, at 6:54 AM, Howard Hinnant wrote: > I've completed a survey of llvm for unnecessary dependencies on > libstdc++, and on conflicts with the upcoming C++0X standard, and am > recommending several changes in the enclosed patch (created with svn > diff). Thanks, applied here: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091130/092102.html I

Sorry, always end up not replying to the list: The main issue with dealing with next this way is that people adding new uses of next will probably not be using c++0x and therefore won't know it's ambiguous and that it needs to be qualified. There are also two issues with rvalue references and the STL: 1. EquivalenceClasses, in the insert and findLeader functions, it uses map functions

On Dec 3, 2009, at 5:24 AM, Ahmed Charles wrote: > Sorry, always end up not replying to the list: > > The main issue with dealing with next this way is that people adding new uses of next will probably not be using c++0x and therefore won't know it's ambiguous and that it needs to be qualified. True. But when this code is compiled under C++0X you get an easy to diagnose, easy

In lib/Target/X86/X86COFFMachineModuleInfo.h we have: class X86MachineFunctionInfo; ... class X86COFFMachineModuleInfo : public MachineModuleInfoImpl { ... typedef std::map<const Function*, X86MachineFunctionInfo> FMFInfoMap; FMFInfoMap FunctionInfoMap; ... }; At this point in the translation unit X86MachineFunctionInfo is an incomplete type, yet it is

Hey, Downloaded the release, used CMake to create solution... building mostly seems to be OK, except for a couple of compiler errors. warning C4090: 'function' : different 'const' qualifiers d:\companyone\external\llvm\source\llvm-2.7\lib\support\regengine.inc 188 error C2248: 'llvm::EquivalenceClasses<ElemTy>::ECValue::ECValue' : cannot access private member

Hey, So I tried to fix these errors, and have everything compiling now... not too difficult, just annoying. error C2248: 'llvm::EquivalenceClasses< > > ElemTy>::ECValue::ECValue' : cannot access private member declared in class > 'llvm::EquivalenceClasses<ElemTy>::ECValue' C:\Program Files > (x86)\Microsoft Visual Studio 10.0\VC\include\xmemory 208

On 9/4/20 3:37 AM, Luo, Yuanke wrote: > > Hi Hal, > > Thank you for the ideas that help us to improve the design, and sorry > for replying late. There is something I am not able to figure out and > there some special trait for tile RA. > You're quite welcome. > 1.X86RegisterInfo::getRegAllocationHints can tell RA which physical > register is preferred, but it

On 3 December 2012 10:42, Mayur Pandey <mayurthebond at gmail.com> wrote: > So this seems to be the cause of the problem. I guess you're mixing two different problems. First, is the possible lack of conformance with the ABI you state, which I can't comment since I don't know that ABI very well. Second, is the fact that clang is not printing correct debug information (or is

The current LLVM CVS HEAD does not build for me (RedHat 9). The issue is a one line fix. The file "include/llvm/ADT/EquivalenceClasses.h" needs to include <stdint.h> in order to get the typedef for "intptr_t." If anyone wants me to make a patch for this, let me know. The build error that this solves is: llvm[3]: Compiling DataStructure.cpp for Debug build In file

Fix typo From: Luo, Yuanke Sent: Friday, September 4, 2020 9:47 PM To: 'Hal Finkel' <hfinkel at anl.gov>; Topper, Craig <craig.topper at intel.com>; Kaylor, Andrew <andrew.kaylor at intel.com>; Philip Reames <listmail at philipreames.com>; llvm-dev at lists.llvm.org; florian_hahn at apple.com; Lu, Hongjiu <hongjiu.lu at intel.com> Subject: RE: [llvm-dev]

Hello. I come back to this thread. But I want to ask a slightly different question. Is there a way to have LLVM IR language intrinsics that are given at construction time a string that is written at assembly generation time as it is? (so, basically having placeholders of strings in LLVM that remain untouched until the end, including code generation time.) More exactly, I would

The target description .td files are allowed to change the default allocation order on a register class by overriding the allocation_order_begin() and allocation_order_end() methods on TargetRegisterClass. Previously, this was used all the time to filter out stack and frame pointers and other reserved registers. I was able to remove most of these custom allocation orders in the tree because the

Hi All, I'm writing a code generation with my compiler. I read sever example and documentation but I did understand what I make wrong. What I try to do is a compare a local variable with a constant. But when I create a ICMP instruction I get that instruction are not of same type. I'm using llvm by svn repository updated at two week ago. The code that I try to generation is something

Hi, Yuanke, Thanks for writing this up. Let me back up a bit because the scheme I proposed last week doesn't work without further modification: within a particular "configuration region" (i.e., the code in between the LDTILECFG and the TILERELEASE (or next LDTILECFG)), each tile register can only be used with one shape, and in addition, no register can have its shape changed

> Can you elaborate what "direct" means? I'm having trouble understanding what the opposite (a non-exact value) would be. Apologies, "exact" was a misleading/incorrect term. By direct, I mean that the expression computes the value of the variable, as opposed to its memory address, or the value that it points to. Within LLVM, where we don't have DW_OP_reg/DW_OP_breg

> Yeah, because that decision can only be made much later in LLVM in AsmPrinter/DwarfExpression.cpp. > In DWARF, DW_OP_reg(x) is a register l-value, all others can either be l-values or r-values depending on whether there is a DW_OP_stack_value/DW_OP_implicit* at the end. Yes, it might not be clear but that's what I'm trying to say. Out of the non-empty DWARF locations, register and

Hi Justin, my class is a visitor pattern and I use accept method to go recursive in suboject in my AST. In locals I store AllocaInst pointer. void *visit(var1_init_decl_c *symbol) { llvm::Type *lType; varNames.clear(); varType = ""; symbol->var1_list->accept(*this); /* get a vector contains variable names */ symbol->spec_init->accept(*this); /* Store in

Hi Alex, You might find it useful to look at how lib/Target/PowerPC/PPCCTRLoops.cpp works. -Hal ----- Original Message ----- > From: "Alex Susu via llvm-dev" <llvm-dev at lists.llvm.org> > To: "llvm-dev" <llvm-dev at lists.llvm.org> > Sent: Monday, May 30, 2016 5:09:37 PM > Subject: [llvm-dev] Back end with special loop instructions > > Hello.

On 08/11/2011 02:56 PM, Duncan Sands wrote: > Hi Florian, > >> we'd like to be able to check for loss of information in trunc operations in >> our LLVM-based bounded model checker [1]. For this it is important if the >> trunc was on a signed or unsigned integer, so we need nsw and nuw flags for >> this. Would you accept a patch that adds these flags to LLVM (and

This is a simple SSA code generation 101 question. If I follow the IR code generation techniques in the Dragon book the statement x = y + z would translate into something like this in SSA/LLVM %0 = add %y, %z %x = %0 Obviously "copy instructions" like %foo = %bar are senseless in SSA since %foo and %bar are immutably fixed to the same value and there is no need for two aliases