Displaying 20 results from an estimated 11000 matches similar to: "[LLVMdev] Viewing graphs while debugging code under windows?"
2009 Dec 01
2
[LLVMdev] Viewing graphs while debugging code under windows?
hi eli,
i delete the cache of cmake, and reconfigure the project, but
HAVE_GRAPHVIZ still undefine. do you know what i should do? thanks
very much.
regards
--ether
On Tue, Dec 1, 2009 at 12:41 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Mon, Nov 30, 2009 at 8:32 PM, ether zhhb <etherzhhb at gmail.com> wrote:
>> hi all,
>>
>> i just install gv and
2009 Dec 01
0
[LLVMdev] Viewing graphs while debugging code under windows?
Hi Ether,
I work under Windows and am able to view graphs generated by LLVM. I
haven't tried generating and viewing dog graphs while debugging but I
hope this helps. What I do is to invoke llc.exe and pass a switch to
generate the graph at the stage(s) you want to see (DAG combine,
legalize, scheduling, etc), for example: llc.exe mykernel.ll
-view-legalize-dags -f. The graphs are saved
2009 Dec 01
1
[LLVMdev] Viewing graphs while debugging code under windows?
Hi Ether,
The detection for graphviz / dotty / ... has been added recently to llvm cmake. It should work properly if those tools are available in the PATH. The related svn commits are : 86153, 86547 and 86644. Those commits are not present in llvm release <= 2.6, but they are straight forward to apply.
Best regards,
--
Arnaud de Grandmaison
-----Original Message-----
From: llvmdev-bounces at
2009 Dec 01
0
[LLVMdev] Viewing graphs while debugging code under windows?
On Mon, Nov 30, 2009 at 8:32 PM, ether zhhb <etherzhhb at gmail.com> wrote:
> hi all,
>
> i just install gv and dotty for windows, but i cant see any way to
> configure it using cmake.
>
> is Viewing graphs under windows supported? and how could i configure it?
LLVM doesn't use a specific search path to find the relevant
executables for that feature. I don't see
2010 Apr 13
2
[LLVMdev] The "scope" of passes
hi again :)
On Tue, Apr 13, 2010 at 8:57 AM, ether zhhb <etherzhhb at gmail.com> wrote:
> hi john,
>
> thanks very much, i will try it out.
>
> --best regards
> ether
>
>
> On Mon, Apr 12, 2010 at 10:03 PM, John Criswell <criswell at uiuc.edu> wrote:
>
>> ether zhhb wrote:
>>
>>> hi all,
>>>
>>> i have some thing
2010 Apr 10
3
[LLVMdev] The "scope" of passes
hi all,
i have some thing not so sure about "scope" of llvm passes:
suppose i have a function pass PassF and a BasicBlock analysis pass PassB.
if i want to use the analysis result of PassB for a BasicBlock in PassF, i
think i can create PassB in runOnFunction of PassF, and call runOnBasicBlock
manually to get the result:
PassB pb; //create a PassB
//we also need consider the analysis
2010 Apr 13
2
[LLVMdev] The "scope" of passes
Devang Patel wrote:
> On Mon, Apr 12, 2010 at 6:41 PM, ether zhhb <etherzhhb at gmail.com> wrote:
>
>
>> that's because FunctionPass implement the "addLowerLevelRequiredPass"
>> function, but others not.
>>
>> so, is there any special reason that only "addLowerLevelRequiredPass" is
>> allow?
>>
>>
>
>
2010 Apr 13
0
[LLVMdev] The "scope" of passes
On Mon, Apr 12, 2010 at 6:41 PM, ether zhhb <etherzhhb at gmail.com> wrote:
> that's because FunctionPass implement the "addLowerLevelRequiredPass"
> function, but others not.
>
> so, is there any special reason that only "addLowerLevelRequiredPass" is
> allow?
>
There is no reason to not allow it. It is not done because there was
not any use. If
2009 Dec 04
2
[LLVMdev] "SrcValue is not a pointer?" assertion in SelectionDAG::getSrcValue
hi,
i am building selectionDAG by my own code, but got a assertion fail
said "SrcValue is not a pointer?".
but since the comment above the SrcValueSDNode said: "SrcValueSDNode -
An SDNode that holds an arbitrary LLVM IR Value." why the llvm value
of SrcValueSDNode must be with PointerType? is that assertion
necessary? thanks a lots.
regards
--ether
2010 Apr 19
2
[LLVMdev] The "scope" of passes
ether zhhb wrote:
> hi John,
>
> sorry for reply so late.
>
> On Tue, Apr 13, 2010 at 10:38 PM, John Criswell <criswell at uiuc.edu
> <mailto:criswell at uiuc.edu>> wrote:
>
> Devang Patel wrote:
>
> On Mon, Apr 12, 2010 at 6:41 PM, ether zhhb
> <etherzhhb at gmail.com <mailto:etherzhhb at gmail.com>> wrote:
>
>
2010 Apr 17
0
[LLVMdev] The "scope" of passes
hi John,
sorry for reply so late.
On Tue, Apr 13, 2010 at 10:38 PM, John Criswell <criswell at uiuc.edu> wrote:
> Devang Patel wrote:
>
>> On Mon, Apr 12, 2010 at 6:41 PM, ether zhhb <etherzhhb at gmail.com> wrote:
>>
>>
>>
>>> that's because FunctionPass implement the "addLowerLevelRequiredPass"
>>> function, but others
2009 Dec 04
0
[LLVMdev] "SrcValue is not a pointer?" assertion in SelectionDAG::getSrcValue
Hello Ether,
I think it is referring to the Value class (captial V) whose documentation is found at http://llvm.org/doxygen/classllvm_1_1Value.html . It has to be a pointer because the Value class is a parent class to many many child classes.
--Sam
----- Original Message ----
> From: ether zhhb <etherzhhb at gmail.com>
> To: LLVM Developers Mailing List <llvmdev at
2011 Apr 08
0
[LLVMdev] [GSoC] Increase the coverage of Polly
Hi,
2011/4/8 Vlad Krylov <krvladislav at gmail.com>:
> Hi.
>
> I see that to detect scops firstly we search for regions in CFG ( by
> RegionInfo ) and then select regions that answer some requirements (
> in ScopDetection ). Because only affine expressions in conditions and
> bounds are permissible, we trying to get scalar expressions into
> affine form by
2009 Sep 04
1
[LLVMdev] viewing dags
Hi
I would like to view the various dags being output during codegen.
Unfortunately, I am not seeing the files being dumped. I will really
appreciate if someone can help me here
llc switch.bc -f -view-dag-combine1-dags ( i tried -view-isel-dags,
-view-sched-dags as well)
Writing '/tmp/llvm_zbbAKM/dag.main.dot'... done.
Writing '/tmp/llvm_G4rLKf/dag.main.dot'... done.
Writing
2010 Apr 17
1
[LLVMdev] SCEV expression for ICmpInst
Be careful about oversimplifying signed integer comparisons -- integer arithmetic can easily overflow, so you cannot transform A > B to A - B > 0. The compare instructions in most processors do not simply subtract and test the most significant bit; they compute what the sign of the difference would be in extended precision.
On Apr 17, 2010, at 1:00 PM, llvmdev-request at cs.uiuc.edu wrote:
2011 Apr 07
3
[LLVMdev] [GSoC] Increase the coverage of Polly
Hi.
I see that to detect scops firstly we search for regions in CFG ( by
RegionInfo ) and then select regions that answer some requirements (
in ScopDetection ). Because only affine expressions in conditions and
bounds are permissible, we trying to get scalar expressions into
affine form by AffineSCEVIterator. At present there plugs for scev
types Truncate, ZeroExtend, SignExtend, UDivExpr,
2009 Dec 11
2
[LLVMdev] combine ISD::SETCC by custom routine
hi,
i have a backend that want to do custom combine on SETCC nodes.
but some time SETCC was combined into BR_CC before i can visit it to
do my own combine, because DAGCombiner always do its own combine
before custom combine. so, is there anyway to prevent it being
combined without changing the logic of DAGCombiner?
thank you very much
--ether
2010 Apr 17
2
[LLVMdev] SCEV expression for ICmpInst
Hi,
i am playing the ScalarEvolution these days. i found the the ScalarEvolution
will simply return a SCEVUnknow for a ICmpInst, so i think maybe great to
add a new kind of SCEV to the ScalarEvolution framework.
for example, if i run ScalarEvolution on the bc file generate from the
following C source file:
int f(int a, int b, int c, int d) {
return (2 * a + 5 * c + 2) > (4 * d - 3*b
2009 Nov 17
1
[LLVMdev] LLVM target-independent code generator for reconfigurable logic
hi every one,
i am use LLVM targeting a architecture with a processor and
reconfigurable logic around it.
now the llvm code generator work fine with the processor, but i am
struggling to make the code generator to generate proper DAGs for the
reconfigurable logic because "The LLVM target-independent code
generator is designed to support efficient and quality code generation
for standard
2009 Dec 11
1
[LLVMdev] combine ISD::SETCC by custom routine
hi Eli,
thanks for reply :)
i am currently decompose the BR_CC node to a target SETCC node and a
target BRCOND node, but since BR_CC node sometimes is combine from a
BRCOND node and SETCC node, so i just wondering if theres any better
way :)
regards
--ether