Displaying 8 results from an estimated 8 matches similar to: "[LLVMdev] -debug and -print-machineinstrs broken"
2009 Nov 13
0
[LLVMdev] -debug and -print-machineinstrs broken
> Are these known to be broken right now? I get failure when using either.
>
> $ llc -march=arm -print-machineinstrs hw.bc
Seems due to David's patches.
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2009 Nov 13
1
[LLVMdev] -debug and -print-machineinstrs broken
On Friday 13 November 2009 15:17, Anton Korobeynikov wrote:
> > Are these known to be broken right now? I get failure when using either.
> >
> > $ llc -march=arm -print-machineinstrs hw.bc
>
> Seems due to David's patches.
Ok. Send me a testcase and I will fix. This should be put into
the testbase.
-Dave
2009 Nov 13
0
[LLVMdev] -debug and -print-machineinstrs broken
On Nov 13, 2009, at 1:49 PM, David Greene wrote:
> On Friday 13 November 2009 15:17, you wrote:
>>> Are these known to be broken right now? I get failure when using either.
>>>
>>> $ llc -march=arm -print-machineinstrs hw.bc
>>
>> Seems due to David's patches.
>
> Ok, it's faulting in SlotTracker with what looks like a bad Function. One
2009 Nov 13
1
[LLVMdev] -debug and -print-machineinstrs broken
On Friday 13 November 2009 16:28, Dan Gohman wrote:
> On Nov 13, 2009, at 1:49 PM, David Greene wrote:
> > On Friday 13 November 2009 15:17, you wrote:
> >>> Are these known to be broken right now? I get failure when using
> >>> either.
> >>>
> >>> $ llc -march=arm -print-machineinstrs hw.bc
> >>
> >> Seems due to
2013 Dec 12
0
[LLVMdev] How to build a map between IR Instruction and MachineInstrs?
Hi,
I try to add a backend (machine function) pass in LLVM 3.3 source code.
In order to analyse precise information of machine instructions, I need some information of
IR instruction which corresponds to MachineInstrs. If so, it's much easier to analyse IR Instructions instead of MachineInstrs.
However, in the frame of LLVM 3.3, I can't find the corresponding(connected) information
from
2013 Dec 14
1
[LLVMdev] How to build a map between IR Instruction and MachineInstrs?
Hi,
Thanks for your answer.
I am looking for a map, and the data structure of this map is
map<const Instruction *, vector<MachineInstr*> >
In this map, its keyvalue is IR instruction pointer, and
its second value is a container which is composed of MachineInstr lowering by its keyvalue.
For example:
IR Instruction
%0 = load i32* getelementptr inbounds ([6 x i32]* @a, i32 0,
2009 Nov 13
4
[LLVMdev] -debug and -print-machineinstrs broken
On Friday 13 November 2009 15:17, you wrote:
> > Are these known to be broken right now? I get failure when using either.
> >
> > $ llc -march=arm -print-machineinstrs hw.bc
>
> Seems due to David's patches.
Ok, it's faulting in SlotTracker with what looks like a bad Function. One of
the Argument values is corrupted.
I'm not abdicating responsibility, but at
2017 Feb 10
3
Enforcing in post-RA scheduling to keep (two) MachineInstrs together
Hello.
I am using the post-RA (Register Allocation) scheduler to avoid data hazards by
inserting other USEFUL instructions from the program (besides NOPs) and it breaks apart
some sequences of instructions which should remain "glued" together.
More exactly, in my [Target]ISelDAGToDAG.cpp it is possible that I replace for
example a BUILD_VECTOR with a machine SDNode called