similar to: [LLVMdev] IMPORTANT: Post-regalloc scheduling and JIT

Hi all, I can't find a way to add a MachineFunctionPass to the common codegen passes (LLVMTargetMachine::addPassesToEmitMachineCode) while JITting (the pass manager is associated with the jitstate of the JIT and I can't access it because it's private). Have I missed something? Or adding a MachineFunctionPass to codegen requires to change the

On Sep 14, 2009, at 10:54 PM, Nicolas Geoffray wrote: > Hi all, > > I can't find a way to add a MachineFunctionPass to the common codegen > passes (LLVMTargetMachine::addPassesToEmitMachineCode) while JITting > (the pass manager is associated with the jitstate of the JIT and I > can't > access it because it's private). Have I missed something? Or adding a >

Hi, I am working on an LLVM backend for GPUs, and I would like to be able to emit a very simple byte stream of machine code, so that it can be fed directly into the GPU. I don't need anything fancy, just the raw machine code, one instruction after another. I think I've already implemented everything in the backend that is required to do this, but I'm not sure how to get a pointer to

> -----Original Message----- > From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Mehdi > Amini via llvm-dev > Sent: Friday, January 06, 2017 11:10 AM > To: Sumanth Gundapaneni > Cc: LLVM Developers > Subject: Re: [llvm-dev] LLVMTargetMachine with optimization level passed > from clang. > > > > On Jan 6, 2017, at 10:56 AM, Sumanth

I am creating an ExecutionEngine using the LLVMCreateExecutionEngineForModule function from the C API. I am get a set fault with the following backtrace. Program received signal EXC_BAD_ACCESS, Could not access memory. Reason: KERN_INVALID_ADDRESS at address: 0x0000000000000120 0x0000000107c06643 in llvm::LLVMTargetMachine::addCommonCodeGenPasses () (gdb) bt #0 0x0000000107c06643 in

On Tue, Jul 20, 2010 at 3:41 PM, Olivier Meurant <meurant.olivier at gmail.com> wrote: > New patch taking Eli's comments into account. Comments inline. If you have commit access, I'd fire away. If not, I can. diff --git include/llvm/MC/MCAssembler.h include/llvm/MC/MCAssembler.h index 07ca070..afff96e 100644 --- include/llvm/MC/MCAssembler.h +++ include/llvm/MC/MCAssembler.h

New patch. Thanks for all of your comments ! > Comments inline. If you have commit access, I'd fire away. If not, I can. I don't have commit access, if you find it ok, please commit it. :) Olivier. On Wed, Jul 21, 2010 at 6:56 AM, Reid Kleckner <reid.kleckner at gmail.com> wrote: > On Tue, Jul 20, 2010 at 3:41 PM, Olivier Meurant > <meurant.olivier at gmail.com>

On Sun, 15 Jul 2007, Paolo Invernizzi wrote: > First, I'm not sure if deleting the ExecutionEngine is all I need to > clean-up... so I started with a minimal test just to check Is this llvm 2.0 or llvm svn head? Several minor memory leaks have been fixed since llvm 2.0. -Chris > int main( int argc, char **argv ){ > while( true ){ > Module *M = new

Hi all, There was a recent change to how the JIT works. Before, you would pass a flag into the code generator to indicate whether you wanted "fast" code generation or normal code generation. Now, we have a finer-grained control over this. An enum value is passed instead of a boolean flag. The change you should make: every call to addPassesToEmitFile, addPassesToEmitFileFinish,

First, I'm not sure if deleting the ExecutionEngine is all I need to clean-up... so I started with a minimal test just to check int main( int argc, char **argv ){ while( true ){ Module *M = new Module("M"); Function *F = cast<Function>(M->getOrInsertFunction("F", Type::Int32Ty, (Type*)0)); BasicBlock *BB = new

Here is a problem scenario. I want to enable a backend pass at -O2 or above. if (TM->getOptLevel() >= CodeGenOpt::Default) addPass(&xxxxx); This pass will be run at -O1 too since clang is creating the TargetMachine with CodeGenOpt::Default for -O1. --Sumanth G -----Original Message----- From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com] Sent: Friday, January 6, 2017

I checked recent revisions 138624 and 138620 and both produce this log with gcc-4.6.0 on FreeBSD-8.2-STABLE amd64: gmake[2]: Entering directory `/usr/home/yuri/llvm-svn/llvm-objects/lib/CodeGen' llvm[2]: Compiling LLVMTargetMachine.cpp for Release build /usr/home/yuri/llvm-svn/llvm/lib/CodeGen/LLVMTargetMachine.cpp:253:3: error: ‘AsmStreamer’ does not name a type

Hi, I found some different discrepancy on how Subtarget is created between some arch specific TargetMachine constructor. For example, for BPF/Lanai: BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options,

On Feb 24, 2011, at 8:14 AM, David A. Greene wrote: > Chris Lattner <clattner at apple.com> writes: > >>> class CodeGenOpt { >>> ... >>> public >>> getOptLevel() ...; >>> getFPLevel() ...; >>> getMemLevel() ...; >>> }; >>> >>> Does this sound reasonable? >> >> I don't think that this is

getOptLevel() gets the level from TargetMachine which is created by the Backendutil in clang with either "Default", "None" or "Aggressive". Threre is no correspondence for "Less". This boils down to , if I pass "-O1", the Target Machine is created with CodeGenOpt::Default. I am available on IRC @ sgundapa. -----Original Message----- From:

Chris Lattner <clattner at apple.com> writes: >> class CodeGenOpt { >> ... >> public >> getOptLevel() ...; >> getFPLevel() ...; >> getMemLevel() ...; >> }; >> >> Does this sound reasonable? > > I don't think that this is the right way to go. Higher level > decisions like that should affect your choice of passes to

On Thursday 23 July 2009 18:07, Evan Cheng wrote: > Ok. As with any heuristics change, some tests will benefit, some will > suffer. I am ok with both sets of changes assuming there are ways to > control them. Yep, we have flags. > Post-ra scheduling has been working for a while. The reason it's not > turned on for x86 is it's not helping much (1 or 2%) while the compile

On Feb 5, 2010, at 2:01 AM, Gergö Barany wrote: > On Thu, Feb 04, 2010 at 13:59:08 -0800, Evan Cheng wrote: >> A more pressing need is a pre-regalloc scheduler that can switch modes to >> balance reducing latency vs. reducing register pressure. > > Right. I'm actually working on implementing a variant of IPS (Goodman and > Hsu, Code scheduling and register allocation

On Jul 23, 2009, at 12:42 PM, David Greene wrote: > We have two features for register allocation we'd like to contribute > if folks > think they are worthwhile. We want to get a read on whether they > will be > useful to people. > > The first features backschedules reloads during the spilling phase. > As > reloads are generated, we have some very simple code

On Apr 17, 2007, at 2:24 PM, Chris Lattner wrote: > On Tue, 17 Apr 2007, David Greene wrote: >> Evan Cheng wrote: >>> Obviously, smart heuristics can make a big difference here >>> (estimated >>> register pressures, etc.) But the more important thing is how the >>> passes down stream can recover from the earlier mistakes. By >>> this, we