similar to: [LLVMdev] Mailing list for out-of-band MSP430 backend discussion

When building with Clang for the MSP430 architecture against headers distributed with TI MSP GCC, interrupt service routine interrupt(vector_number) attribute is rejected: __attribute__ ((interrupt(USCI_A0_VECTOR))) void ISR(void) { } error: 'interrupt' attribute parameter 48 is out of bounds This is due to the check in tools/clang/lib/Sema/SemaDeclAttr.cpp:5104 unsigned Num

On Fri, Jun 11, 2010 at 2:55 PM, Ben Ransford <ransford at cs.umass.edu> wrote: > Yesterday I noticed that MSP430 argument passing is broken in trunk; > see http://llvm.org/PR6573 for details and testcases.  The problem is > that calls aren't being preceded by instructions that put the > arguments into registers.  I backtracked my working copy and then > stepped forward

Hi all, I'm rappedly moving away from windows, but one of the last programs i need to run in windows is 'IAR Embedded Workbench (Kickstart Version)' I've tried to run it some time ago (i think about 2 months back) in wine, but it didn't work so well back then. I haven't tried it with newer versions since then. I need that program so i can program my msp430

Hello, Yesterday I noticed that MSP430 argument passing is broken in trunk; see http://llvm.org/PR6573 for details and testcases. The problem is that calls aren't being preceded by instructions that put the arguments into registers. I backtracked my working copy and then stepped forward until it broke between r98937 and r98938. Refining further, I found that rolling back the

Hello, I have a user asking about msp430 support for Zig. When they try to target msp430, this error is triggered: if (target_machine->addPassesToEmitFile(MPM, dest, ft)) { *error_message = strdup("TargetMachine can't emit a file of this type"); return true; } I tried using clang alone: clang -c add.c -target msp430-unknown int add(int

Hi, Is there any implementation for MSP430 backend to LLVM ? Maybe at very early phase. (I did not found anything in google). I need this because mspgcc's support of newest TI's MCU seems very unstable. If there any project for MSP430, I'd better join it rather than develop the whole thing from scratch. --- Regards, Dmitry

Hello, Within the file "MSP430InstrFormats.td" there is a class called "MSP430Inst" which has "Instruction" as superclass. Within this class there is a field called "Inst" (field bits<16> Inst;) which gets assigned in classes which specifies a specific instruction format, e.g. IForm contains: let Inst{12-15} = opcode; let Inst{7} = ad.Value; let

The Inst field is used to specify instruction encodings, which are then used to generate assemblers and disassemblers. I'm not sure offhand, but it's possible that the MSP430 backend doesn't make use of an auto-generated assembler. --Owen On Jul 21, 2013, at 4:19 PM, David Wiberg <dwiberg at gmail.com> wrote: > Hello, > > Within the file

Hi Gents, For those of us with out-of-tree backends which are not 32bit, the msp430 backend is a useful vehicle for examining changes and testing out ideas. So I was wondering about enabling debug output on the MSP430 backend so that I can illustrate a few issues to Adrian and you on the variable pieces side. (there doesn't appear to be any specific person claiming the msp430 code right

On Thu, Jul 6, 2017 at 1:35 AM, Nicholas Wilson < iamthewilsonator at hotmail.com> wrote: > Luís, try using the -no-integrated-as flag to execute the assembler for > you. > We should probably make that the default for MSP430. > Cool. When I did that on macOS, LDC generated a lot of complaints, possibly because it is assuming mach-o files. I tried changing from -mtriple=msp430

Hello, While trying to find out why the LDC compiler refuses to generate object code for MSP430 targets (but generates MSP430 assembly or LLVM IR/bitcode), I came across the following apparent inconsistency. This works: $ clang --target=msp430 -c test.c This doesn't work: $ clang --target=msp430 -S -emit-llvm test.c $ llc -filetype=obj test.ll /opt/msp430/bin/llc: target does not support

On Thu, Jul 6, 2017 at 2:19 AM, Tim Northover <t.p.northover at gmail.com> wrote: > On 5 July 2017 at 17:51, Luís Marques via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > Cool. When I did that on macOS, LDC generated a lot of complaints, > possibly > > because it is assuming mach-o files. I tried changing from > -mtriple=msp430 > > to

Interested in building a speex codec (basically audio <-> speex <-> data stream) using TI's small MSP430 microcontroller. Is there any way to estimate feasibility based on CPU requirements? Example - speex is happily encoding on an old Pentium-1 processor (166 MHz) using about half the CPU (as reported under Linux); the TI microcontrollers are much slower yet (8-16-25 MHz) and

Hello > inline asm code is like below: > > void test(unsigned short a) { >    asm("myinstr          my16bitreg, %0"::"r"(a)); > } > I want it generate instruction "myinstr          my16bitreg, r15" > > I execute > llc test.bc -march = msp430 -o test.s > then it reports > "LLVM ERROR: Couldn't allocate input reg for constraint

Hi Anton, Need i write additial c/c++/td code for my target to support inline asm? Regrads 2009/12/18 Anton Korobeynikov <anton at korobeynikov.info> > Hello > > > inline asm code is like below: > > > > void test(unsigned short a) { > > asm("myinstr my16bitreg, %0"::"r"(a)); > > } > > I want it generate instruction

Hi, 1. This instruction is not selected automatically by the instruction selector. The instruction combine / select stages insert registercopies, and they are expanded later on by the copyRegToReg() function provided by the MSP430InstrInfo to this MOV16rr. 2. ReMaterializable means there is no need to find a way to preserve the value in a register : the instruction can be just be reissued

Hi everyone, inline asm code is like below: void test(unsigned short a) { asm("myinstr my16bitreg, %0"::"r"(a)); } I want it generate instruction "myinstr my16bitreg, r15" I execute llc test.bc -march = msp430 -o test.s then it reports "LLVM ERROR: Couldn't allocate input reg for constraint 'r' !" What's the reason?