similar to: [LLVMdev] X86 Disassembler

Displaying 20 results from an estimated 700 matches similar to: "[LLVMdev] X86 Disassembler"

2009 Aug 18
0
[LLVMdev] X86 Disassembler
Hi Sean, > the attached diff implements a table-driven disassembler for the X86 > architecture (16-, 32-, and 64-bit incarnations), integrated into > the MC framework. The disassembler is table-driven, using a custom > TableGen backend to generate hierarchical tables optimized for fast > decode. The disassembler consumes MemoryObjects and produces arrays > of
2009 Aug 19
3
[LLVMdev] X86 Disassembler
Bill, thanks for your comments. I'll respond to them individually. I've attached a new revision of the patch that addresses them. Patch built and tested against SVN 79487, with the additional attached fix that fixes an Intel table bug. Sean On 2009/08/18, at 0:57, Bill Wendling wrote: > 0. Watch out for tabs! Fixed. Thanks. > 1. Includes like this "#include
2009 Aug 22
0
[LLVMdev] X86 Disassembler
On Aug 19, 2009, at 4:39 PM, Sean Callanan wrote: > thanks for your comments. I'll respond to them individually. I've > attached a new revision of the patch that addresses them. Patch > built and tested against SVN 79487, with the additional attached fix > that fixes an Intel table bug. Thanks Sean, comments below. Are you sure you attached the updated patch? I
2007 Jul 11
3
[LLVMdev] Pluggable Register Coalescers
On Jul 11, 2007, at 11:39 AM, David Greene wrote: > On Wednesday 11 July 2007 12:41, Tanya M. Lattner wrote: > >> I think the coalescer should be flexible enough to be run >> independent of >> the register allocator. For example, you may want to expose the >> copies >> induced by transforming out of SSA to the scheduler. If the >> scheduler is
2009 Sep 06
2
[LLVMdev] Sparc debug info patch
Please review the enclosed patch for Sparc debug info. I have been able to view source files, set breakpoints, and single step source lines after applying this patch. I can't view variables because I haven't implemented Dwarf type data, yet. -Rich -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: sparcdebug.patch URL:
2009 Sep 04
1
[LLVMdev] X86 Disassembler
I was away doing other things for a while, but I have an API patch separated out, which (in addition to being much smaller than past megapatches) corrects two issues Chris identified in his most recent set of patches: - First, it makes the API a good deal simpler. Now, you can instantiate a single MCDisassembler and, each time you want an instruction disassembled, you can simply pass
2011 Oct 12
2
[LLVMdev] llvm-objdump related patch
Michael, I have rework the patch according to your suggestion. And I have read binutil/objdump source code and found that it has a logic that if there's no symtab, it will use dynsym, which is missing in llvm-objdump. Songmao -------------- next part -------------- A non-text attachment was scrubbed... Name: 0002-Fix-the-address-calculation-for-llvm-objdump.patch Type: text/x-patch
2009 Apr 01
1
[LLVMdev] Visual Studio 2005/2008 ClangDiagnosticsEmitter Patch
I'm in the process of trying to build LLVM and clang in Visual Studio 2008. Building trunk of LLVM and clang fails because of an VC STL issue: http://connect.microsoft.com/VisualStudio/feedback/ViewFeedback.aspx?Fee dbackID=328343 Here's a patch that allows tablegen to compile: Index: TableGen/ClangDiagnosticsEmitter.cpp
2009 Sep 08
0
[LLVMdev] Sparc debug info patch
On Sep 6, 2009, at 1:34 PM, Richard Pennington wrote: > Please review the enclosed patch for Sparc debug info. > I have been able to view source files, set breakpoints, and single > step source lines after applying this patch. I can't view variables > because I haven't implemented Dwarf type data, yet. Cool! I'm glad to see progress on the sparc backend: +++
2016 Oct 28
2
RFC: Removing the DataStreamer and MemoryObject interfaces
Hi all, BitstreamReader is the only in-tree client of the DataStreamer and MemoryObject interfaces. In practice when using user-facing LLVM tools, the bitcode will normally either be in memory or in a file, so the best way to access it is through memory, either directly or memory mapped. As part of some refactorings I am making to BitstreamReader, I would like to simplify it by changing it to
2016 Oct 28
0
RFC: Removing the DataStreamer and MemoryObject interfaces
And on a separate thread [0] Derek indicated he'd be fine with removing it. I'll leave this thread open until end of Monday to receive any other opinions, then proceed to remove it. Peter [0] http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20161024/400754.html On Fri, Oct 28, 2016 at 10:08 AM, Peter Collingbourne <peter at pcc.me.uk> wrote: > Hi all, > >
2011 Oct 13
0
[LLVMdev] llvm-objdump related patch
On Wed, Oct 12, 2011 at 3:17 AM, Songmao <smtian at ingenic.cn> wrote: > Michael, >    I have rework the patch according to your suggestion.  And I have read > binutil/objdump source code and found that it has a logic that if there's no > symtab, it will use dynsym, which is missing in llvm-objdump. > > Songmao > @@ -747,12 +747,28 @@ error_code
2016 Oct 28
1
RFC: Removing the DataStreamer and MemoryObject interfaces
Awesome! Thanks, Rafael On 28 October 2016 at 13:14, Peter Collingbourne <peter at pcc.me.uk> wrote: > And on a separate thread [0] Derek indicated he'd be fine with removing it. > I'll leave this thread open until end of Monday to receive any other > opinions, then proceed to remove it. > > Peter > > [0] >
2008 Apr 22
1
[LLVMdev] newbie with pass registering Problem
Hi!! This is my first time with llvm. I'm still learning and really need help. I wrote only one Function Pass, which uses another Function Pass (blockNrs), and registered this: RegisterPass<FunctionAnalysis> X("gasched", "Genom Scheduling Pass"); When I compile my sourcecode, everything was okay. But when I tried to test it, i got this error Message: nicole at
2016 Jul 13
3
[cfe-dev] [RFC] __attribute__((internal_linkage))
Hi Evgenii, I have one question about this (planned) change: what if a function is not inlined? The linker will not ODR merge them with this change, which isn’t great. What makes “internal” linkage more desirable than "linkonce_odr + visibility hidden"? — Mehdi > On Jul 12, 2016, at 6:16 PM, Evgenii Stepanov via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi,
2013 Aug 25
2
[LLVMdev] Problems with class inheritance in LLVM
Hi, I have a simple program example attached. All it does is try to derive a class from llvm::MemoryObject. Can anyone tell me why this fails to compile with this error message: clang -DHAVE_CONFIG_H -I. -I../src -I../include -I../test -I/usr/include/llvm-c-3.2 -I/usr/include/llvm-3.2 -O0 -g3 -Wall -O0 -Wall -g3 -MT mem.o -MD -MP -MF .deps/mem.Tpo -c -o mem.o mem.cpp mv -f .deps/mem.Tpo
2009 Nov 06
2
[LLVMdev] Functions: sret and readnone
Hi Stephan, > intrinsic float4 sample(int tex, float2 tc); > > float4 main(int tex, float2 tc) > { > float4 x = sample(tex, tc); > return 0.0; > } without additional information it would be wrong to remove the call to sample because it might write to a global variable. > As you can see, the call to the sample function is still present, > although the actual value
2010 Aug 04
3
[LLVMdev] Announcing: LLVM 2.8 Release Schedule
Good news, everybody! It's that time of year again. We are going to release LLVM 2.8! I'm taking over for Tanya to give her a much needed break. I can only hope to perform as well as she has. This is my first time as release manager, so bear with me if things don't go smoothly. This message is mostly to give you an idea of the schedule we're planning on. It's an aggressive
2009 Jun 29
7
[LLVMdev] Profiling in LLVM Patch
Hi all, as proposed in http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/020396.html I implemented the algorithm presented in [Ball94]. It only instruments the minimal number of edges necessary for edge profiling. The main changes introduced by this patch are: *) a interface compatible rewrite of ProfileInfo *) a cleanup of ProfileInfoLoader (some functionality in ProfileInfoLoader
2007 Jul 13
0
[LLVMdev] [PATCH] Re: Pluggable Register Coalescers
On Wednesday 11 July 2007 15:07, Christopher Lamb wrote: > Could it be possible for there to be a harness type interface that > would allow coalescers that support both modes to be hooked into the > pass registration, and those that depend on the allocator not be > registered as passes? I have a patch for this kind of thing attached. Please take a look and let me know if it looks