similar to: [LLVMdev] LLCM Compiler Job

Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] LLCM Compiler Job"

2012 May 09
1
[LLVMdev] AMD OpenCL Compiler Lead position
COMPILER Compiler Lead, Stream Computing We are currently looking for a software engineer as part of the core team developing OpenCL, a new open standard for heterogonous general purpose programming, compilers for multi-core CPU and many-core graphics systems. The engineer will be involved in all aspects of OpenCL compiler features, using LLVM, development and maintenance and will
2008 Oct 16
0
[LLVMdev] AMD LLVM compiler position
Hi, AMD is currently looking for talented compiler engineers to work with LLVM and this list seemed like a good place to let people know. Below is the job description, please send me an email if you are interested. Regards, Ben Compiler engineer ATI is now part of the new AMD. AMD and ATI have joined forces, combining AMD¹s technology leadership in microprocessors with ATI¹s strengths in
2011 Mar 04
2
[LLVMdev] Full Time LLVM Compiler position
Compiler Engineer, Stream Computing We are currently looking for a software engineer as part of the core team developing OpenCL, a new open standard for heterogonous general purpose programming, compilers for multi-core CPU and many-core graphics systems. The engineer will be involved in all aspects of OpenCL compiler features, development and maintenance and will participate in performance
2011 Aug 18
0
[LLVMdev] LLVM Compiler Engineer Position @ AMD
LLVM Compiler Engineers, OpenCL We are currently looking for a software engineer as part of the core team developing the OpenCL, an open standard for heterogonous general purpose programming, compiler for multi-core CPU and many-core graphics systems. We are looking to fill positions in the compiler where the candidate will be involved with the maintenance and development of code generation
2013 Apr 01
0
[LLVMdev] JOB: Compiler engineering positions @ AMD Sunnyvale, CA
1. Senior Compiler Engineer, Stream Compute Team - AMD, Sunnyvale, California We are currently looking for a senior software engineer to join the core team developing our OpenCL compiler stack for multi-core CPU and many-core graphics systems. The selected candidate will be involved in all aspects feature development and maintenance, and will participate in performance tuning for new multi-core
2011 Mar 03
0
[LLVMdev] Summer Intern Position
GPU Compiler Intern, OpenCL Compiler Team AMD is looking for an summer intern to work with our core team developing OpenCL, an open standard for heterogonous general purpose programming, compilers for multi-core CPU and many-core graphics systems. The intern will be tasked with helping develop optimization and/or code generation passes for AMD GPU's. Knowledge of LLVM or contribution to LLVM
2011 Nov 08
0
[LLVMdev] GPU Compiler Intern, OpenCL Compiler Team
AMD is looking for a spring intern to work with our core team developing OpenCL, an open standard for heterogonous general purpose programming, compilers for multi-core CPU and many-core graphics systems. This is a paid position. The intern tasks usually range from implementing extensions to OpenCL that touch the entire compiler stack all the way down to device specific optimizations. As
2012 Jan 27
0
[LLVMdev] Summer 2012 Intern position @ AMD
GPU Compiler Intern, OpenCL Compiler Team AMD is looking for an summer intern to work with our core team developing OpenCL, an open standard for heterogonous general purpose programming, compilers for multi-core CPU and many-core graphics systems. The intern will be tasked with helping develop OpenCL features or optimizations for AMD products using LLVM. Knowledge of LLVM or contribution to LLVM
2018 Feb 15
1
[GSOC 2018] Project covering LLVM and GPU
All, This year I am very interested in participating in the Google Summer of Code with a LLVM project. The main reason is that I am starting a Bachelor's Thesis about compilers that will target directly LLVM. (Note that I would like to continue beyond Bachelor) The project that me and my advisor have chosen is about compiler optimizations for GPGPU. Although I have seen some proposals for
2013 May 12
0
[LLVMdev] JOB AD: PathScale's compiler frontend/GPGPU team
== JOB POSTING == PathScale's compiler team is looking for individuals interested in GPGPU, C++, Visual Studio compatibility and compiler frontend (clang) work. Most of the work will be on our clang fork, but anyone interested to work on other parts is always welcome. (IDE, optimized math libs, debugger, compiler backend.. etc) Location: Remote (anyone who doesn't want to relocate to
2009 Nov 24
0
[LLVMdev] Intel Corporation - Graphics Software Engineer - 567075 (LLVM)
Please review the job description below and reply if you are interested in a LLVM job at Intel Corporation. Best regards, Larry Gonzales Sourcing Specialist Intel Corporation/VCG larry.z.gonzales at intel.com<mailto:larry.z.gonzales at intel.com> Interested in Graphics at Intel? Visit: <http://www.intel.com/jobs/careers/visualcomputing/>
2012 Aug 09
3
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp
I'm probably missing something simple here but in: CGDebugInfo.h: std::vector<std::pair<void *, llvm::WeakVH> >ReplaceMap; but then in CGDebugInfo.cpp: llvm::DIType TC = getTypeOrNull(Ty); void * v = Ty.getAsOpaquePtr(); std::pair<void *, llvm::WeakVH> tmp = std::make_pair(v, TC); if (TC.Verify() && TC.isForwardDecl())
2012 Aug 09
1
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp
Hi Ben, Thanks that helped a lot. The problem seems to be that with the move to C++11 we now have: void std::vector<_Ty>::push_back(std::pair<_Ty1,_Ty2> &&)' and there no conversion operator that can be applied to convert: 'std::pair<_Ty1,_Ty2>' to 'std::pair<_Ty3,_Ty4> && Where: [ _Ty1=void *,
2012 Aug 09
0
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp
On 09.08.2012, at 19:43, "Gaster, Benedict" <Benedict.Gaster at amd.com> wrote: > I’m probably missing something simple here but in: > > CGDebugInfo.h: > > std::vector<std::pair<void *, llvm::WeakVH> >ReplaceMap; > > but then in > > CGDebugInfo.cpp: > > llvm::DIType TC = getTypeOrNull(Ty); > > void * v =
2012 Apr 03
0
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
On Mon, Apr 2, 2012 at 7:16 AM, Yabin Hu <yabin.hwu at gmail.com> wrote: > Hi all, > > I am a phd student from Huazhong University of Sci&Tech, China. The > following is my GSoC 2012 proposal. > Comments are welcome! > > *Title: Automatic GPGPU Code Generation for LLVM* > > *Abstract* > Very often, manually developing an GPGPU application is a
2012 Dec 03
0
[LLVMdev] [polly] removing cloog dependence in the testsuite
On 12/03/2012 07:42 PM, Sebastian Pop wrote: > Tobias Grosser wrote: >> On 12/03/2012 06:07 PM, Sebastian Pop wrote: >>> Tobias Grosser wrote: >>>> Regarding patch one and three: We already have the directory >>>> test/CodeGen and test/IslCodeGen. I propose to just leave the CLooG test >>>> cases in test/CodeGen, but to run them conditionally.
2012 Dec 03
2
[LLVMdev] [polly] removing cloog dependence in the testsuite
Tobias Grosser wrote: > On 12/03/2012 06:07 PM, Sebastian Pop wrote: > >Tobias Grosser wrote: > >>Regarding patch one and three: We already have the directory > >>test/CodeGen and test/IslCodeGen. I propose to just leave the CLooG test > >>cases in test/CodeGen, but to run them conditionally. > > > >I only know how to disable the test of a full
2009 Sep 04
3
[LLVMdev] TOT opt does not terminate!
The following code causes opt to not terminate! With TOT this morning, and of a week ago: clang foo.c and clang -O1 foo.c work fine. clang -O2 foo.c and clang -O3 foo.c do not terminate. (At least after 10 minutes) If I generate the bit code (clang-cc -emit-llvmbc) and then run: opt -O3 foo.bc it does not terminate. //foo.c int get_id(int); typedef short
2012 Apr 03
0
[LLVMdev] GSoC 2012 Proposal: Automatic GPGPU code generation for llvm
Hi Yabin, Instead of compile the LLVM IR to PTX asm string in a ScopPass, you can also the improve llc/lli or create new tools to support the code generation for Heterogeneous platforms[1], i.e. generate code for more than one target architecture at the same time. Something like this is not very complicated and had been implemented[2,3] by some people, but not available in LLVM mainstream.
2009 Jun 16
5
[LLVMdev] x86 Intel Syntax and MASM 9.x
Hi Eli, Yep I was being stupid. Please find attached a patch for initial changes to get MASM working. There is still one problem that I am looking into around changing alignments within SEGMENTS. The problem is that MASM allows 2,4,16,256 alignments, default being 16, but LLVM is sometimes generating 32 alignment, for example, consider the following code: float bar(float fy, float fx) {