similar to: [LLVMdev] GEP instruction change

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] GEP instruction change"

2009 Aug 21
0
[LLVMdev] GEP instruction change
On Fri, Aug 21, 2009 at 2:02 AM, Artur Pietrek<pietreka at gmail.com> wrote: > Hi All, > Since few days I observe weird change. > Consider the following C code > > char array[] = "0123456789"; > extern int test(char arr[], int size); > > int main(void) { >   return test(array-1, sizeof(array)-1); > } > > using clang frontend i get this: > >
2009 Aug 21
1
[LLVMdev] GEP instruction change
On Fri, Aug 21, 2009 at 12:33 PM, Eli Friedman <eli.friedman at gmail.com>wrote: > On Fri, Aug 21, 2009 at 2:02 AM, Artur Pietrek<pietreka at gmail.com> wrote: > > Hi All, > > Since few days I observe weird change. > > Consider the following C code > > > > char array[] = "0123456789"; > > extern int test(char arr[], int size); > >
2009 Mar 30
2
[LLVMdev] MSIL codegen
Hello, I work in Kalray (Montbonnot, France) and I'm PhD student at Universite Joseph Fourier in Grenoble. We want to use LLVM framework for MSIL code generation, which is part of my thesis. Currently I'm still reading LLVM's documentation and I've started completing the MSIL backend for running on Mono. Things that need to be fixed include pointers initialization, call to
2010 Apr 15
2
[LLVMdev] Few questions about stack frame and calling conventions implementation in a backend
On Thu, Apr 15, 2010 at 3:40 AM, Artur Pietrek <pietreka at gmail.com> wrote: > Hi all > Ups, I'm really sorry for that previous message, I've sent it by mistake. > > So let me write it once more. > > I've been working for some time now on a backend for our CPU. However I > couldn't figure out how to implement some stuff. > I'd appreciate your help
2010 Jun 29
2
[LLVMdev] [patch] DwarfDebug problem with line section
I updated DwarfDebug to use section offset, instead of hard coding 0, to handle LTO properly. r107202. Thanks for brining this up. - Devang On Tue, Jun 29, 2010 at 11:27 AM, Devang Patel <devang.patel at gmail.com> wrote: > DW_AT_stmt_list attribute's value is a section offset to the line no > info for current compilation unit. If there is only one  compilation > unit
2010 Jun 29
2
[LLVMdev] [patch] DwarfDebug problem with line section
Hi all, While implementing debug info for our backend, we've noticed a problem with debug_line section. We believe that the following code is wrong: // DW_AT_stmt_list is a offset of line number information for this // compile unit in debug_line section. It is always zero when only one // compile unit is emitted in one object file. addUInt(Die, dwarf::DW_AT_stmt_list, dwarf::DW_FORM_data4,
2009 Mar 30
0
[LLVMdev] MSIL codegen
Hi Artur, Artur Pietrek wrote: > Hello, > > I work in Kalray (Montbonnot, France) and I'm PhD student at Universite > Joseph Fourier in Grenoble. > We want to use LLVM framework for MSIL code generation, which is part of > my thesis. > Currently I'm still reading LLVM's documentation and I've started > completing the MSIL backend for running on Mono.
2010 Apr 16
0
[LLVMdev] Few questions about stack frame and calling conventions implementation in a backend
Hi Andrew, thanks for answering On Thu, Apr 15, 2010 at 3:35 PM, Andrew Lenharth <andrewl at lenharth.org>wrote: > On Thu, Apr 15, 2010 at 3:40 AM, Artur Pietrek <pietreka at gmail.com> wrote: > > Hi all > > Ups, I'm really sorry for that previous message, I've sent it by mistake. > > > > So let me write it once more. > > > > I've
2010 Jun 29
0
[LLVMdev] [patch] DwarfDebug problem with line section
DW_AT_stmt_list attribute's value is a section offset to the line no info for current compilation unit. If there is only one compilation unit generated per .o file then it is always zero. What kind of errors are you seeing ? - Devang On Tue, Jun 29, 2010 at 9:02 AM, Artur Pietrek <pietreka at gmail.com> wrote: > Hi all, > While implementing debug info for our backend, we've
2009 May 26
1
[LLVMdev] sign and zero extensions question
Hi,Could someone explain to me how the sign/zero extensions in LLVM work, please? If I understood correctly, the int type in LLVM doesn't keep the information about signedness of an int. So the question is how can I know if instructions like Load or Trunc should be signed or not? I guess that at least ARM backend produces sign extended load so if someone could point me to the code where it
2010 Jun 30
0
[LLVMdev] [patch] DwarfDebug problem with line section
Hi Devang, Thanks for working on that. Unfortunately after your change it still doesn't work (I've tried x86 and our backend under Linux). The problem is that you put difference between two labels .Lset7 = .Lsection_line_begin-.Lsection_line ## DW_AT_stmt_list and that will be evaluated by assembler to a constant. It has to be a label, not a constant, because it is the linker who knows
2010 Jun 30
2
[LLVMdev] [patch] DwarfDebug problem with line section
On Wed, Jun 30, 2010 at 1:57 AM, Artur Pietrek <pietreka at gmail.com> wrote: > Hi Devang, > Thanks for working on that. Unfortunately after your change it still doesn't > work (I've tried x86 and our backend under Linux). What errors exactly you are seeing ? > The problem is that you put difference between two labels > .Lset7 = .Lsection_line_begin-.Lsection_line ##
2009 Nov 20
1
[LLVMdev] NoFolder class problem
Hi all, while I was playing a little bit with IRBuilder I ended up with something like this when included NoFolder.h /work/llvm/include/llvm/User.h: In member function ‘llvm::Value* llvm::NoFolder::CreateExtractElement(llvm::Constant*, llvm::Constant*) const’: /work/llvm/include/llvm/User.h:48: error: ‘static void* llvm::User::operator new(size_t)’ is private
2010 Apr 15
2
[LLVMdev] Few questions about stack frame and calling conventions implementation in a backend
Hi all, I've been working for some time now on a backend for our CPU. However I couldn't figure out how to implement some stuff. I'd appreciate your help with these. First thing is return address -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100415/989f532c/attachment.html>
2010 Apr 15
0
[LLVMdev] Few questions about stack frame and calling conventions implementation in a backend
Hi all Ups, I'm really sorry for that previous message, I've sent it by mistake. So let me write it once more. I've been working for some time now on a backend for our CPU. However I couldn't figure out how to implement some stuff. I'd appreciate your help with these. First thing is return address saving. To do that, first I have to copy it to a general purpose register. I
2009 Oct 20
2
[LLVMdev] Opportunities for meeting more frequently than once a year?
Hi Jean-Daniel On Mon, Oct 19, 2009 at 3:24 PM, Jean-Daniel Dupas <devlists at shadowlab.org>wrote: > > Le 19 oct. 2009 à 15:05, Kenneth Uildriks a écrit : > FWIW, there is a LLVM bar camp planed in Paris the next month: > > http://barcamp.org/LLVM%20BarCamp%20Paris (French web page) > > > -- Jean-Daniel > Could you please tell me if it will be in French or
2009 Oct 06
3
[LLVMdev] TableGen question - how to split a 64bit operation to two 32bit
Hi all,I'm working on my own backend for a custom CPU. I have defined paired registers for 64bit operations, however to set a 64bit paired register with 64bit immediate I have to set each register in that pair separately with the higher and the lower 32bits of the immediate. Could anyone give me an advice how to describe it in *InstructionInfo.td or point me to something similar in the LLVM
2010 Aug 31
2
[LLVMdev] [cfe-dev] Debug information on multiple files
On Aug 31, 2010, at 2:15 AM, Renato Golin wrote: > On 26 August 2010 09:32, Krister Wombell <kuwerty at gmail.com> wrote: >> I've also been looking at debugging with ELF and noticed the same problem as >> Renato. I just sent a patch to llvmcommits that fixes the problem. >> DW_at_stmt_list needs to emit a label(and therefore a relocation) for the >> offset
2009 Oct 06
0
[LLVMdev] TableGen question - how to split a 64bit operation to two 32bit
Hi Artur, The Thumb2 target (in lib/Targets/ARM/ARMInstrThumb2.td) materializes a 32-bit constant by a two-instruction sequence to load the low and high half-words. It's not pretty, but it works. The pattern is at the bottom of the file. Regards, -Jim On Oct 6, 2009, at 5:10 AM, Artur Pietrek wrote: > Hi all, > I'm working on my own backend for a custom CPU. I have defined
2009 Apr 16
2
[LLVMdev] Patch: MSIL backend global pointers initialization
Hi Anton > > > The interesting for me part of the CallInst is printf(i8* noalias %0, i32 > > 123). > > I was diging in doxygen documentation but I really can't see the easy way > to > > compare those instructions and again finish with reinvented (but working) > > wheel ;). > Ah, sorry. I missed that you're doing variadic calls, not casting >