similar to: [LLVMdev] What is the purpose of the %”alloca point” line which occurs in llvm code

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] What is the purpose of the %”alloca point” line which occurs in llvm code"

2010 Jun 08
4
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
Hi All, The GHC developers would like to add support to llvm to enable the order that code and data are laid out in, in the resulting assembly code produced by llvm to be defined by the user. The reason we would like to have this feature is explained in the blog post on GHC's use of llvm here: http://blog.llvm.org/2010/05/glasgow-haskell-compiler-and-llvm.html, specifically under the title,
2010 Jun 08
2
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
Let me point out that projects using standard toolchain (e.g. binutils) can already reorder code and data pretty much arbitrary using sections and linker scripts. I think it's still attractive to have reordering in LLVM to be independent from external toolchain. This will allow reordering in JIT and other interesting things. I agree with John that special global with ordered list looks like
2010 Jun 15
9
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
Hi all, Just wanted to report that I've found a second way to achieve data/code layout (the first being the linker script that Eugene mentioned). The key is that gnu as supports a feature called subsections. http://sourceware.org/binutils/docs-2.20/as/Sub_002dSections.html#Sub_002dSections The way this works is that you can put stuff into a section like '.text 2', where 2 is a
2010 Jun 08
0
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
On Tue, 8 Jun 2010 11:42:41 +0100, David Terei <davidterei at gmail.com> wrote: > Hi All, > > The GHC developers would like to add support to llvm to enable the > order that code and data are laid out in, in the resulting assembly > code produced by llvm to be defined by the user. The reason we would > like to have this feature is explained in the blog post on GHC's
2010 Sep 13
4
[LLVMdev] Any experiemnts/evaluations on LLVM and graph rewriting (term-rewriting) systems?
Hi, are there any attempts to use LLVM in graph-rewriting (term-rewriting) language implementations? How good is LLVM for this? E.g., is it natural to expect that the LLVM-based implementation of the language Concurrent Clean be any faster than its reference implementation? Best regards -- Valery A.Khamenya -------------- next part -------------- An HTML attachment was scrubbed... URL:
2010 Jun 10
2
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
Its good to see that a feature of this nature would be useful to a whole range of people, I wasn't aware of that. On 9 June 2010 22:40, Andrew Lenharth <andrewl at lenharth.org> wrote: > My argument amounts to express side tables as side tables in the IR > rather than as an ordering on globals.  I think that would simplify > the backend (a side table is something you discover
2009 Nov 12
4
[LLVMdev] opt -std-compile-opts breaks tail calls
tail calls are only implemented for fastcall calling convention if i remeber right from my inquiries. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20091112/e8f1dd2a/attachment.html>
2010 Jun 17
1
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
On 15 June 2010 23:08, Eugene Toder <eltoder at gmail.com> wrote: > Subsections is a very good idea. You can even do without > post-processing by using carefully crafted section names, e.g. > > __attribute__((section(".text,\"ax\", at progbits\n\t.subsection 1 #"))) > void foo() > { > } There is one problem with the section name used here,
2010 Sep 14
0
[LLVMdev] Any experiemnts/evaluations on LLVM and graph rewriting (term-rewriting) systems?
Hi Valery On 13 September 2010 19:07, Valery Khamenya <khamenya at gmail.com> wrote: > are there any attempts to use LLVM in graph-rewriting (term-rewriting) > language implementations? I've added a new LLVM backend to the ghc Haskell compiler. > How good is LLVM for this? Works very well. I'm operating from the low levels of the ghc compiler though where I don't
2010 May 17
1
[LLVMdev] GHC's LLVM Backend
Hi All, The Glasgow Haskell compiler has recently become an external user of LLVM. You can read about it here: http://blog.llvm.org/2010/05/glasgow-haskell-compiler-and-llvm.html If you have any comments, questions or perhaps even advice on solving some of the issues that need to be fixed in the backend going forward then please reply to this email. Cheers, David
2009 Jun 29
4
[LLVMdev] Pinning registers in LLVM
Hi all, I'm working on using LLVM as a back-end for an existing compiler (GHC Haskell compiler) and one of the problems I'm having is pinning a global variable to a actual machine register. I've seen mixed terminology for this feature/idea, so what I mean by this is that I want to be able to put a global variable into a specified hardware register. This declaration should
2010 Jun 10
0
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
On Thu, Jun 10, 2010 at 11:34 AM, David Terei <davidterei at gmail.com> wrote: > Its good to see that a feature of this nature would be useful to a > whole range of people, I wasn't aware of that. > > On 9 June 2010 22:40, Andrew Lenharth <andrewl at lenharth.org> wrote: >> My argument amounts to express side tables as side tables in the IR >> rather than as
2010 Jun 08
0
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
On Tue, Jun 8, 2010 at 4:15 PM, Eugene Toder <eltoder at gmail.com> wrote: > Let me point out that projects using standard toolchain (e.g. > binutils) can already reorder code and data pretty much arbitrary > using sections and linker scripts. > I think it's still attractive to have reordering in LLVM to be > independent from external toolchain. This will allow reordering
2009 Oct 12
3
[LLVMdev] Alloca Requirements
Are there any implicit assumptions about where alloca instructions can appear. I've got a failing test where the only difference between a passing test and a failing test is one application of this code in instcombine: // Convert: malloc Ty, C - where C is a constant != 1 into: malloc [C x Ty], 1 Seems pretty harmless to me. Later on the instcombine code does this: // Scan to the end of
2011 Oct 17
2
[LLVMdev] Request for merge: GHC/ARM calling convention.
On 15 October 2011 00:31, Duncan Sands <baldrick at free.fr> wrote: > Hi David, > >> The code above is needed as the GHC calling convention redefines what >> registers are considered callee save. No one else rummages in to the >> original function as all the other calling conventions use the same >> set of callee and caller save registers, so GHC is the only one
2011 Apr 02
0
[LLVMdev] Explicit register usage in LLVM assembly
Hi Yiannis, As has been said GHC had this problem (I'm the author of GHC's LLVM backend). GHC uses 4 pinned registers on x86-32 and 16 on x86-64. The solution is to use a custom calling convention. I would argue that this is a better solution then having the registers completely reserved as in the middle of a function llvm can spill those registers to free them up for temporary use. Also,
2010 Jun 09
2
[LLVMdev] Adding support to LLVM for data & code layout (needed by GHC)
Yes, the global structure is constant. This is indeed a side-table. Overriding section of global to be in text is simple -- LLVM already supports section attribute on globals and functions. However we also need a specific ordering in text. With some extra work this ordering can be achieved with gnu linker (I posted example implementation earlier) without any changes to LLVM, so the main points for
2010 Jul 12
0
[LLVMdev] Promoting malloc to alloca
We don't have any such optimization. Firstly, the pointer has to not make it into any function call at all, since any function might in turn call free(). Then we need to do escape analysis as you pointed out, but that's not difficult. We do similar analysis to determine pointer capture already. Matt Giuca wrote: > I have a compiler which generates a lot of malloc instructions for
2015 Sep 07
3
RFC: alloca -- specify address space for allocation
On 2 Sep 2015, at 02:54, Joseph Tremoulet via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Reading further, I see both that addrspacecast "can be a no-op cast or a complex value modification"[2] and that bitcast "may only be [used on pointers] with the same address space"[4]. > > So I'm getting the impression that it's ok to have a model with
2010 Jul 12
3
[LLVMdev] Promoting malloc to alloca
I have a compiler which generates a lot of malloc instructions for basically all data. I was rather hoping that these mallocs would be converted to allocas if the pointers didn't escape. This would require an escape analysis, and I'm not sure if LLVM has such a thing. For instance, consider this code (typical of the output of my compiler): define i32 @dontescape(i32 %x) { entry:   %t =