Displaying 20 results from an estimated 800 matches similar to: "[LLVMdev] llc undefined symbol"
2009 Aug 11
0
[LLVMdev] llc undefined symbol
On Aug 11, 2009, at 8:23 AM, Michael Graumann wrote:
> I'm writing a pass for the llc tool. If I try to load my pass(llc -
> load ../mypass.so), this error message appears :
>
> Error opening '/nfs/wsi/ti/graumann/llvm-2.5/Release/lib/
> LLVMMicha.so': /nfs/wsi/ti/graumann/llvm-2.5/Release/lib/
> LLVMMicha.so: undefined symbol:
>
2009 Aug 11
1
[LLVMdev] llc undefined symbol
Hi
At the moment there are in my pass only this virtual function
(runOnMachineFunction). maybe is there an other reason?
Thank you
Michael
-----Ursprüngliche Nachricht-----
Von: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] Im
Auftrag von Mike Stump
Gesendet: Dienstag, 11. August 2009 19:16
An: LLVM Developers Mailing List
Betreff: Re: [LLVMdev] llc undefined symbol
On
2006 Aug 03
0
[LLVMdev] Adding register allocator to LLVM
Welcome to the world of pluggable machine passes. This work was done
to lighten the load of some llvm tools, ie., only link in the
register allocators and instruction schedulers that are actually
needed in a particular circumstance. I guess I will have to write
this up, but generally it works like this.
In your register allocator .cpp file add the following include;
#include
2006 Aug 03
3
[LLVMdev] Adding register allocator to LLVM
Hi!
I'm developing a register allocator and need it to be available as an option
for llc tool. I used to edit /lib/CodeGen/Passes.cpp for this aim but after
yesterday's update these options are defined somewhere else and I can't find
the place.
Thanks for your help.
Tony.
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2007 Dec 18
6
All anchored series from a vector?
>From: Johannes Graumann <johannes_graumann at web.de>
>Date: 2007/12/18 Tue PM 04:40:37 CST
>To: r-help at stat.math.ethz.ch
>Subject: [R] All anchored series from a vector?
lapply(1:length(myvector) function(.length) {
c(myvector[1}:myvector[.length])
})
but test it because i didn't.
>Hi all,
>
>What may be a smart, efficient way to get the following result:
2009 Aug 01
1
[LLVMdev] Inserting Instructions (pass)
Hi,
both versions are working:
FunctionType *asm_Ftype = FunctionType::get(Type::VoidTy, std::vector<const
Type*>(), false);
InlineAsm* Iasm =
InlineAsm::get(asm_Ftype,"isync","~{dirflag},~{fpsr},~{flags}",true);
How can I insert this InlineAsm, because it is no instruction and this way
it will not work:
Instruction *pi = bi;
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have
to say that the definition of the "multiclass avx512_gather" from
lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it.
I currently have some serious problems with TableGen - it gives an assertion failure:
2005 Aug 23
1
Robust M-Estimator Comparison
Hello,
I'm learning about robust M-estimators right now and had settled on the
"Huber Proposal 2" as implemented in MASS, but further reading made clear,
that at least 2 further weighting functions (Hampel, Tukey bisquare) exist.
In a post from B.D. Ripley going back to 1999 I found the following quote:
>> 2) Would huber() give me results that are similar (i.e., close
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
I wanted to inform that I fixed the bug from the previous email.
The main reason for the bug was that I thought that the SDNode masked_gather is
returning only 1 value, but it returns 2 (hence, I guess, the earlier reported, difficult
to follow, error: "Assertion `New->getNumTypes() == 1").
masked_gather returns 2 values because:
// SDTypeProfile -
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
I fixed the bug reported in the previous post on this thread
(<<llvm::MemSDNode::MemSDNode(unsigned int, unsigned int, const llvm::DebugLoc&,
llvm::SDVTList, llvm::EVT, llvm::MachineMemOperand*): Assertion `memvt.getStoreSize() <=
MMO->getSize() && "Size mismatch!"' failed.>>)
The problem with this strange error reported comes from
2009 Aug 01
2
[LLVMdev] Inserting Instructions (pass)
Thank you Chris,
for your hint, but I am still too stupid. I tried two versions
asm_arguments.push_back(Type::VoidTy);
FunctionType *asm_type = FunctionType::get(Type::VoidTy, asm_arguments,
false);
Alternatively
FunctionType *asm_type = FunctionType::get(Type::VoidTy, std::vector<const
Type*>(), false);
. Can you give me a snippet of example code, or somebody else?
2009 Jun 30
0
[LLVMdev] modifying llc asm output
On Tue, Jun 30, 2009 at 8:33 AM, Michael
Graumann<MichaelGraumann at gmx.net> wrote:
> Hi
>
> I am trying to modify the llc in that way:
>
>
>
> subf 3, 5, 3 subf 3, 5, 3
>
> stw 3, 44(1) stw 3, 44(1)
>
> # InlineAsm
2009 Jun 30
1
[LLVMdev] modifying llc asm output
Ok :-) und how can I add inlined assembly to the output?
- Michael
-----Ursprüngliche Nachricht-----
Von: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] Im
Auftrag von Bill Wendling
Gesendet: Dienstag, 30. Juni 2009 19:16
An: LLVM Developers Mailing List
Betreff: Re: [LLVMdev] modifying llc asm output
On Tue, Jun 30, 2009 at 8:33 AM, Michael
Graumann<MichaelGraumann
2009 Aug 01
0
[LLVMdev] Inserting Instructions (pass)
On Jul 31, 2009, at 5:04 PM, Michael Graumann wrote:
> Thank you Chris,
> for your hint, but I am still too stupid. I tried two versions
>
> asm_arguments.push_back(Type::VoidTy);
> FunctionType *asm_type = FunctionType::get(Type::VoidTy,
> asm_arguments, false);
>
> Alternatively
>
> FunctionType *asm_type = FunctionType::get(Type::VoidTy,
>
2011 Jul 05
1
Circumventing code/documentation mismatches ('R CMD check')
Hello,
As prompted by B. Ripley (see below), I am transfering this over from R-User
...
For a package I am writing a function that looks like
test <- function(Argument1=NA){
# Prerequisite testing
if(!(is.na(Argument1))){
if(!(is.character(Argument1))){
stop("Wrong class.")
}
}
# Function Body
cat("Hello World\n")
}
Documentation of this is straight forward:
2009 Jul 31
0
[LLVMdev] Inserting Instructions (pass)
On Jul 31, 2009, at 10:24 AM, Michael Graumann wrote:
> Hi,
> I’ am trying to insert an InlineAsm Instruction in my pass, which
> FunctionType do I need for Inlineasm?
> If I understand it right, I need a call instruction to insert the
> new produced InlineAsm?
>
> Thanks for help
Inline asm works like a "callee". So for:
call void asm sideeffect
2010 Mar 10
2
ggplot2: "varwidth"-equivalent for geom_boxplot?
Hi,
Is there such a thing? If no: is it easily simulated?
thanks, Joh
2006 Sep 02
2
[LLVMdev] Adding register allocator to LLVM
Hi all!
I didn't manage to link my regalloc to lli (I added USEDLIBS to its
makefile). Without it I can't run tests cause they need lli to be built. So
how can I link createMyRegisterAllocator function to lli?
Thanks.
On 8/22/06, Anton Vayvod <avayvod at gmail.com> wrote:
>
> I managed to link my RegAlloc.a library to llc tool but can;t make the
> same with lli tool.
2010 Aug 03
3
grid.table and expression in table body?
Hi,
Is there any way to get an expression into a data.frame, such that
"grid.table" from "gridExtra" will plot it evaluated in the table body? The
docu does it for the header, but is the body possible?
Thanks, Joh
2007 Dec 19
4
Factor Madness
Why is class(spectrum[["Ion"]]) after this "factor"?
spectrum <- cbind(spectrum,Ion=rep("",
nrow(spectrum)),Deviation.AMU=rep(0.0, nrow(spectrum)))
slowly going crazy ...
Joh