similar to: [LLVMdev] memory-to-memory instructions

Hello, David > Ah, isLegalToFold saves us on trunk.  But we lose folding due to prefetching, > which is unfortunate. > > I am seeing the error with 2.5 (yes, we are upgrading!). > > I guess I'll have to backport some of the isLogalToFold logic. There was x86-only code at pre-2.6 times which was later moved into generic hook named "isLegalAndProfitableToFold". You

On Monday 22 February 2010 13:26:54 David Greene wrote: > On Monday 22 February 2010 13:06:39 Chris Lattner wrote: > > > Just wanted to clarify in case someone was wondering about this. > > > > I'm currently working in this area. What pattern is causing the cycle? > > Can I get a testcase? > > I'll see if I can generate one and file a PR. Ah,

Hi, >> DAGCombiner::visitBRCOND() has code: >> >> SDValue N1 = N->getOperand(1); >> SDValue N2 = N->getOperand(2); >> >> ... >> >> SDNode *Trunc = 0; >> if (N1.getOpcode() == ISD::TRUNCATE&& N1.hasOneUse()) { >> // Look past truncate. >> Trunc = N1.getNode(); >> N1 = N1.getOperand(0);

Bill Wendling wrote: > On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > >> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >> >>> Our architecture has 1-bit boolean predicate registers. >>> >>> I've defined comparison >>> >>> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set

On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > Bill Wendling wrote: >> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >> >>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>> >>>> Our architecture has 1-bit boolean predicate registers. >>>> >>>> I've defined comparison >>>> >>>> def

On Wed, Jul 27, 2011 at 3:50 PM, Matt Johnson <johnso87 at crhc.illinois.edu> wrote: > Hi Eli, > > On 07/27/2011 04:59 PM, Eli Friedman wrote: >> >> On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson >> <johnso87 at crhc.illinois.edu>  wrote: >>> >>> Hi All, >>>     I'm writing a backend for a target which only supports 4-byte,

Thanks. I have checked the hook DAGCombiner::isMulAddWithConstProfitable And I think the above condition is too aggressive. // If the add only has one use, this would be OK to do. if (AddNode.getNode()->hasOneUse()) return true; Shall we make it to if (AddNode.getNode()->hasOneUse() && TargetLowering.isCheaperCommuteAddMul(......)) return true; The virtual hook

** I am using the following way to get p-values from fiser exact test. However, I do need to print for each pair the values "n00, n01, n10, n11". How can I print that as a table and not a matrix as below along with the p-value? Any help will be greatly appreciated fish <- function(y, x) {n00 = sum((1-x)*(1-y)); n01 = sum((1-x)*y); n10 = sum(x*(1-y)); n11 = sum(x*y); a =

Hi, I'm doing a function that describe two populations in competition. that's the function that i wrote: exclusao<-function(n10, n20, k1, k2, alfa, beta, t){ n1<-k1-(alfa*n20) n2<-k2-(beta*n10) if(t==0){plot(t, n10, type='b', xlim=range(c(1:t),c (1:t)), ylim=range(n10, n20), xlab='tempo', ylab='tamanho populacional') points(t, n20, type='b',

Hi, I want to set a make a contingency table which will look like this.. The problem is that I can't  set the table like the following.                      col1     col2       Total     row1              a         b         n10                      rp1       rp2        100                      cp1       cp2       rtp1   ---------------------------------------------     row2            

On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > >> Our architecture has 1-bit boolean predicate registers. >> >> I've defined comparison >> >> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;

On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > Our architecture has 1-bit boolean predicate registers. > > I've defined comparison > > > def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>; > > > > > But then I end up having the following bug: > >

Hi Eli, On 07/27/2011 04:59 PM, Eli Friedman wrote: > On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson > <johnso87 at crhc.illinois.edu> wrote: >> Hi All, >> I'm writing a backend for a target which only supports 4-byte, >> 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and >> STORE nodes in TargetISelLowering.cpp to take advantage of

Dear R Masters, I have searched high and low (the help archives and my various R reference material and help files) for a solution to what appears to me to be quite a simple problem. In the following syntax, variable n10 has three levels. I would like the symbols that appear in the graph for these three levels to be different colors. The best I have been able to do is to have the Key display

Here's an example patch of how dbgs() will be used. Essentially I will replace uses of errs() with dbgs(). I believe this is the correct thing to do because: - With #define NDEBUG, dbgs() == errs() - With debugging and -debug-buffer-size=0 (the default), dbgs() just passes output to errs(). - When -debug-buffer-size>0, you want to buffer ALL output so that you don't get some

> I am not sure how best to fix this. If possible, InstCombine's canonicalization shouldn't hide arithmetic progressions behind bit masks. At least, it seems these transformations should be disabled unless (X >> C).hasOneUse(). They aren't exactly optimizations. > > This: > >  %div = lshr i32 %a, 2 >  store i32 %div, i32* %p, align 4, !tbaa !0 >  %add = shl

Hello, I'm working in adding support for 64-bit integers to my target. I'm using LLVM to decompose the 64-bit integer operations by using 32-bit registers wherever possible and emulating support where not. When looking at the bit shift decomposition I saw what seems to be a bug in the implementation. The affected function is ExpandShiftWithUnknownAmountBit in LegalizeIntegerTypes.cpp.

On Tue, Apr 17, 2012 at 1:36 PM, Rafael Espíndola < rafael.espindola at gmail.com> wrote: > > I am not sure how best to fix this. If possible, InstCombine's > canonicalization shouldn't hide arithmetic progressions behind bit masks. > At least, it seems these transformations should be disabled unless (X >> > C).hasOneUse(). They aren't exactly optimizations.

For my target, I handle incoming memory arguments by creating a store to memory (in LowerCall, [1]), then creating a fixed object on the stack and loading from it (in LowerFormalArguments[2]). This approach was based on MSP430. I now have the problem that the resulting loads in my output assembly are done assuming that the call stack looks something like: ------ MemArg ------ MemArg ------

All: My employer has required me to pass a computer security certification exam. The folks at Pass4Sure have what I consider the best program. However, it does not want to play nice under Wine. I installed the Demo version of the Network+ test program. It is a native Windows Java application. It wanted to install GDIPLUS and msxml6. I used Winetricks to install them and then tried to run