similar to: [LLVMdev] PostDoc and PhD positions, Vienna

On Mar 25, 2008, at 9:40 AM, Dietmar Ebner wrote: > Chris, > > Chris Lattner wrote: >> I would love to see any progress in this area. It is clearly an >> important thing to tackle, and it is blocking other interesting >> improvements in the code generator. It would also allow us to >> eliminate a significant amount of weirdness that exists to hack >>

Chris, Chris Lattner wrote: > I would love to see any progress in this area. It is clearly an > important thing to tackle, and it is blocking other interesting > improvements in the code generator. It would also allow us to > eliminate a significant amount of weirdness that exists to hack around > this (e.g. switch lowering). we've been working on a whole-function

Evan Cheng wrote: > That's unfortunate. What kind of licensing issues are there? i've talked to our supporting company and they agreed to release the code to interested parties. it's not a copyleft license but the code can be used freely for private and research purposes. be warned that the code is merely a prototype implementation and not ready for inclusion in LLVM. it also

On Mar 31, 2008, at 2:37 AM, Dietmar Ebner wrote: > Evan Cheng wrote: >> That's unfortunate. What kind of licensing issues are there? > i've talked to our supporting company and they agreed to release the > code to interested parties. it's not a copyleft license but the code > can be used freely for private and research purposes. > > > be warned that the

hi, i've got some more things to note. first, the issue is not related to x86_64 being the host machine - it also happens on i686/linux. next, i think (one of) the problem(s) is the use of [HOST_]WORDS_BIG_ENDIAN instead of [HOST_]FLOAT_WORDS_BIG_ENDIAN in llvm-convert.cpp (see patch below). this fixes single precision floating point but breaks double precision. for

hi, we're trying to come up with a static compiler based on llvm for a 4- way vliw architecture with full support for predicated execution. a distinguishing feature is the omission of flag registers. instead, conditions can be paired with a particular instruction within the same bundle. a performance critical issue will be proper use of predicated execution. if-conversion can either

On Mar 7, 2007, at 6:45 AM, Dietmar Ebner wrote: > hi, > > we're trying to come up with a static compiler based on llvm for a 4- > way vliw architecture with full support for predicated execution. a > distinguishing feature is the omission of flag registers. instead, > conditions can be paired with a particular instruction within the > same bundle. Ok. > a

hi, i'm trying to make some experiments with the ARM backend (llvm 2.1) and therefore built an arm-softfloat-linux-gnu toolchain on x86_64 linux. however, the llvm-gcc frontend seems to cause troubles with single precision floating point values, i.e., they are not converted correctly to the particular target format (double precision works as expected). it seems the problem is related to

hello, we're considering LLVM as an excellent framework for a compiler backend for a novel dsp architecture based on vliw principles that is still under development. in this context, two students at our institute are particularly interested in the following projects: I) software pipelining apparently [1], there has been already an remarkable amount of work done by tanya lattner

On Mar 11, 2009, at 9:44 PM, Misha Brukman wrote: > The problem I've had is building an LLVM cross-compiler from Linux/ > x86 to Linux/ARM (as has another llvm-dev poster). Someone > mentioned to me off-list that he managed to get it to build, but I > haven't been able to reproduce the build using his instructions > (I'll post my results in another thread).

On Thu, Mar 12, 2009 at 6:17 AM, Dietmar Ebner <ebner at complang.tuwien.ac.at>wrote: > On Mar 11, 2009, at 9:44 PM, Misha Brukman wrote: > > The problem I've had is building an LLVM cross-compiler from Linux/ > > x86 to Linux/ARM (as has another llvm-dev poster). Someone > > mentioned to me off-list that he managed to get it to build, but I > > haven't

hi, Dale Johannesen wrote: > On Oct 19, 2007, at 7:23 AM, Dietmar Ebner wrote: >> i'm trying to make some experiments with the ARM backend (llvm 2.1) >> and >> therefore built an arm-softfloat-linux-gnu toolchain on x86_64 linux. >> >> however, the llvm-gcc frontend seems to cause troubles with single >> precision floating point values, i.e., they are

On Thu, Feb 04, 2010 at 13:59:08 -0800, Evan Cheng wrote: > A more pressing need is a pre-regalloc scheduler that can switch modes to > balance reducing latency vs. reducing register pressure. Right. I'm actually working on implementing a variant of IPS (Goodman and Hsu, Code scheduling and register allocation in large basic blocks, http://doi.acm.org/10.1145/55364.55407) based on the

On Sat, Jun 16, 2012 at 20:20:23 +0900, Journeyer J. Joh wrote: > I wonder if llvm/Clang can compile C or C++ for ARM from on x86. Yes. I use clang -emit-llvm -ccc-host-triple arm-unknown-linux-gnu -I /..arm../include/ to generate LLVM bitcode files for ARM. llc then automagically knows to generate ARM assembly, and ARM binutils take it from there. > If the cross compiling is supported,

On Feb 5, 2010, at 2:01 AM, Gergö Barany wrote: > On Thu, Feb 04, 2010 at 13:59:08 -0800, Evan Cheng wrote: >> A more pressing need is a pre-regalloc scheduler that can switch modes to >> balance reducing latency vs. reducing register pressure. > > Right. I'm actually working on implementing a variant of IPS (Goodman and > Hsu, Code scheduling and register allocation

Dear all, Our pharmacometrics group is looking for bright and motivated candidates to join our modelling team within the Division of Clinical Pharmacology at the University of Cape Town. Our group has established PK/PD modelling expertise in the disease areas of tuberculosis, HIV, and malaria. It is active internationally and enjoys on-going collaborations and exchange programs with some of the

Dear all, We are looking for bright and motivated candidates to join our pharmacometric modelling team at the University of Cape Town. Pharmacometrics is an emerging discipline that uses mathematical and statistical tools to quantify drug, disease, and trial information to aid efficient drug development and/or regulatory decisions. It designs and applies mathematical models to describe the

On Sat, Aug 28, 2010 at 16:20:42 -0400, Jeff Kunkel wrote: > What I need to know is how to access the machine register classes. Also, I > need to know which virtual register is to be mapped into each specific > register class. I assume there is type information on the registers. I need > to know how to access it. MachineRegisterInfo::getRegClass will give you the TargetRegisterClass

Excellent, I've implemented my own PBQP register allocator and solved the issue very painlessly. Now onto those more interesting problems! Thanks for your suggestion, Fraser On Fri, Oct 5, 2012 at 9:26 AM, Gergö Barany <gergo at complang.tuwien.ac.at>wrote: > On Thu, Oct 04, 2012 at 16:20:53 +0100, Fraser Cormack wrote: > > This architecture has two single-ported register

Thanks for the information. I still don't know how do I partition registers into different classes from the virtual registers? For instance, I have the function who which iterates over the instructions, but I don't know how to write the function which returns the different register class. void RAOptimal::Gather(MachineFunction &Fn) { // Gather just iterates over the blocks,