similar to: [LLVMdev] ARM asm printing syntax

Hi Renato, We are *very* interested in getting ARM MC in shape. It's the core for an ARM assembler, disassembler, and MC JIT. To me, there are three main tasks: 1. Get all of the tests (which are not using inline asm) passing with -integrated-as. 2. Finish up ARM asm parser so integrated-as can support inline asm and to use it to build a standalone assembler. 3. Rewrite the ARM disassembler.

Hi I'm new to speex list but joined because I'm needing to port the Neon to ARM64. On that function, saturate_32bit_to_16bit(), I noticed the ifdef's are wrong. The first version is for normal arm 32 bit arm and should be used for arm32 and thumb2 but not thumb1. The second version is 32 bit neon and should be #ifdef __ARM_NEON__ I've done a third version which is 64 bit neon.

anyone know how to get the aarch64 fork pulled into the mainline speexdsp? The code is provided in the bug report https://github.com/xiph/ speexdsp/issues/7 On Fri, Jul 29, 2016 at 5:21 PM, Frank Barchard <fbarchard at google.com> wrote: > I've filed a bug for aarch64 > https://github.com/xiph/speexdsp/issues/7 > > and provided the port in a fork with a pull request. We

I've filed a bug for aarch64 https://github.com/xiph/speexdsp/issues/7 and provided the port in a fork with a pull request. We need someone to review/merge in the pull request? It provides the source code, but my testing was under Android builds, so there would be some configure changes needed to build it stand alone. On Tue, Apr 19, 2016 at 4:32 PM, Frank Barchard <fbarchard at

Cortex-M0 is a Thumb1 only device. There hasn't been any concerted effort to tune LLVM's Thumb1 output in quite a long time. Even back then (2008 or so), the effort was mainly to get it to work acceptably, with the real performance tuning work being done for Thumb2. I'm not surprised that an embedded market focussed compiler like IAR is better tuned for a chip like that. -Jim On Feb

On Nov 12, 2010, at 11:46 AM, Evan Cheng wrote: > > This should be > > cmp r0, r1 > movlt.w r2, #-1 @ or mvnlt r2, #0 > and.w r0, r2, r3 > bx lr > > which we gets right in Thumb2 mode (I need to check why it's not matching in ARM mode). How can we use a conditional and here? The result is either (y & -1) or (y &

On Nov 12, 2010, at 11:09 AM, Chris Lattner wrote: > On Nov 12, 2010, at 11:04 AM, Evan Cheng wrote: >>> %z = select i1 %cond, i32 -1, i32 %x >>> %s = and i32 %z, %y >>> >>> Is a "conditional and". It would be interesting to know if the ARM backend gets this as a single predicated 'and' instruction (similarly for the 'or' and

Hi Seb, The ARM instruction set is a fixed-width 32-bit instruction set that has been around since the early days of ARM. Modern (armv4t onwards) cores mostly have another instruction set that can be used in tandem, the "thumb" instruction set. This is a variable width (16 or 32 bit) instruction set that provides a subset of the ARM instruction set and was intended to provide the

Hi James, Thanks for the answer, for Cortex-A9 would you recommend to generate thumb2 code or ARM code ? What would be the best performance wise ? Best Regards Seb > -----Original Message----- > From: James Molloy [mailto:james.molloy at arm.com] > Sent: Thursday, May 31, 2012 9:57 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] llc support

I've not run any on non-iOS devices, and haven't looked at GCC since v4.2.1 due to licensing issues, so I don't have a good feel for comparative benchmarking. -Jim On Feb 26, 2013, at 4:20 PM, Reed Kotler <rkotler at mips.com> wrote: > What about benchmarks on other Arm devices? > > On 02/26/2013 02:52 PM, Jim Grosbach wrote: >> Cortex-M0 is a Thumb1 only

What about benchmarks on other Arm devices? On 02/26/2013 02:52 PM, Jim Grosbach wrote: > Cortex-M0 is a Thumb1 only device. There hasn't been any concerted > effort to tune LLVM's Thumb1 output in quite a long time. Even back then > (2008 or so), the effort was mainly to get it to work acceptably, with > the real performance tuning work being done for Thumb2. I'm not >

On Jun 22, 2011, at 2:08 PM, Renato Golin wrote: > On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: >> Unfortunately, you have to live with this. Until recently binutils >> were quite buggy wrt thumb2 code, so, most probably you will need new >> binutils in any case. > > Hi Anton, > > It's not so simple. GPL3 can be quite a

Done, thanks. And added a code review here: http://llvm-reviews.chandlerc.com/D2255 -Greg On Fri, Nov 22, 2013 at 8:48 AM, Amara Emerson <amara.emerson at arm.com> wrote: > Hi Greg, > > Can you post any patches to the commits list, it'll have a better chance of > some of us seeing it and taking a look there. > > Cheers, > Amara > > -----Original

On Mar 13, 2013, at 10:15 AM, Weiming Zhao <weimingz at codeaurora.org> wrote: > Hi Renato, > > It seems to me that LLVM doesn’t parse the inline asm body. It just checks the constraints, (ie. Input/output interface). During ASM writing, it then binding those constraints to placeholders like %0, %1. This is correct. > So it a constraint is a 64-integer type, it *probably*

I haven't tried using -Os/z on any ARM device for the last 3 years, and back then, -Os would break many things. People normally care about code size on Cortex-R/M and ARM9 or older, and in there, not many LLVM users. --renato On 27 February 2013 00:38, Jim Grosbach <grosbach at apple.com> wrote: > I've not run any on non-iOS devices, and haven't looked at GCC since >

Hello to all. When studying forums and mailing lists it seems to me that llvm usage for very small arm v6m targets is not so common. In the last months, I have spent some time on analyzing performance of llvm/clang for very small targets. My main objective was to get the best possible performance from portable (non-assembly) crypto numerics for cortex-M0(+) targets. As a result (crypto

On Mar 13, 2013, at 11:21 AM, Måns Rullgård <mans at mansr.com> wrote: > Jim Grosbach <grosbach at apple.com> writes: > >> On Mar 13, 2013, at 11:01 AM, Renato Golin <renato.golin at linaro.org> >> wrote: >> >>> On 13 March 2013 17:57, Jim Grosbach <grosbach at apple.com> wrote: >>>> It seems to me that LLVM doesn’t parse the

Has anyone benchmarked for -Os/-Oz the LLVM compiler for ARM/Thumb1/Thumb2 against gcc, commerical compilers? Reed

On Wed, Mar 13, 2013 at 1:04 PM, Måns Rullgård <mans at mansr.com> wrote: > Jim Grosbach <grosbach at apple.com> writes: > > > On Mar 13, 2013, at 11:21 AM, Måns Rullgård <mans at mansr.com> wrote: > > > >> Jim Grosbach <grosbach at apple.com> writes: > >> > >>> On Mar 13, 2013, at 11:01 AM, Renato Golin <renato.golin at

On Oct 11, 2011, at 2:43 PM, David A. Greene wrote: > Bill Wendling <wendling at apple.com> writes: > >> Improving the test suite is always welcome. > > Do we have an idea of what sorts of improvements we'd like? Any codes > that we want to add, for example? What would be useful for ARM? > >> In addition, we send out pre-release tarballs and have