similar to: [LLVMdev] Selection of multiple instructions

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Selection of multiple instructions"

2009 Jul 08
0
[LLVMdev] Selection of multiple instructions
On Jul 8, 2009, at 10:16 AM, Artjom Kochtchi wrote: > > Hi, > > I'm currently trying to modify LLVM to include runtime checks into X86 > binaries. I've looked into some of the possibilities during the phases > happening in LLVM and have the impression that inserting runtime > checks > during selection would be great, since lots of optimizations are > already
2009 Aug 03
2
[LLVMdev] code-altering Passes for llc
Dan Gohman-2 wrote: > > You don't need a ModulePass to modify a CFG. A MachineFunctionPass > is fine for this. > Well, okay. But I need to insert some BasicBlock that contains the error handling (that the runtime check jumpts to on failure). Just putting another MachineBasicBlock at the beginning of some arbitrary MachineFunction doesn't seem to be the right way to go, does
2009 Aug 03
0
[LLVMdev] code-altering Passes for llc
Does the error function *have* to be auto-generated in your pass? Perhaps the original code should use invokes, and your pass insert the error check with a jne to the "unwind" block. On Mon, Aug 3, 2009 at 5:18 AM, Artjom Kochtchi<artjom.kochtchi at googlemail.com> wrote: > > > Dan Gohman-2 wrote: >> >> You don't need a ModulePass to modify a CFG. A
2010 Oct 20
1
[LLVMdev] MachineBasicBlock insertion
Hi all, I am really stumped on a problem for long. I could not figure out why. That is why i am here. OK, here is the problem: I tried to insert a MachineBasicBlock into a function. Here is the code snippet: // insert a machine basic block with the error_label into MF and before I // Pred is the predecessor of the block to be inserted // the new basic block is inserted right before I void
2009 Aug 06
2
[LLVMdev] code-altering Passes for llc
Kenneth Uildriks wrote: > > Does the error function *have* to be auto-generated in your pass? > Perhaps the original code should use invokes, and your pass insert the > error check with a jne to the "unwind" block. > If I understand correctly, unwind is some kind of exception handling in LLVM IR? I'm not sure if this is the right thing. First, I include runtime
2009 Jul 01
3
[LLVMdev] Inserting nodes into SelectionDAG (X86)
On Jul 1, 2009, at 2:22 PMPDT, Dan Gohman wrote: >> Ops.push_back(DAG.getConstant(1, MVT::i32)); >> Chain = DAG.getNode(ISD::ADD, DAG.getVTList(MVT::Other, MVT::i32), >> &Ops[0], Ops.size()); >> >> Isn't that the way how it is supposed to work? > > ADD does not use a chain, so there's no chain operand, or > MVT::Other result for it in an ADD
2009 Jul 03
0
[LLVMdev] Inserting nodes into SelectionDAG (X86)
Thanks to your help I've actually made some progress... Especially the SelectionDAGNodes.h was a good hint. But there are still some things that I can't figure out: // 'mov eax, 41' Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), DAG.getConstant(41, MVT::i32), InFlag); InFlag = Chain.getValue(1); // 'inc eax' SDValue eaxVal =
2009 Aug 06
0
[LLVMdev] code-altering Passes for llc
On Aug 6, 2009, at 5:45 AM, Artjom Kochtchi wrote: > So I was searching for a possibility to include an additional > (Machine)BasicBlock (or rather a MachineFunction?) somewhere in the > program > that contains the program termination and that I can jump to on check > failure. Can't I do that during a Pass in llc? If you just have a magic block of instructions you want to
2009 Jun 29
2
[LLVMdev] Inserting nodes into SelectionDAG (X86)
Sorry to ask again, but I still can't get it right. The following code compiles and runs, but produces no instructions: Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); Ops.push_back(DAG.getConstant(1, MVT::i32)); DAG.getNode(ISD::ADD, DAG.getVTList(MVT::i32), &Ops[0], Ops.size()); I reckon that has something to do with the fact that I am not using the Chain object. But as soon
2009 Jun 25
2
[LLVMdev] Inserting nodes into SelectionDAG (X86)
Greetings, I am rather new to LLVM, so please excuse my limited knowledge about it. Currently I am trying to modify the X86TargetLowering::LowerCALL method by inserting additional instructions before the call. As far as I understand, nodes are created by calling the getNode method on the DAG. If, for example, I insert the following code Ops.push_back(Chain); Chain = DAG.getNode(ISD::TRAP,
2009 Aug 02
2
[LLVMdev] code-altering Passes for llc
Greetinigs, I am extending llc to include runtime checks for calls (in X86). So a call 'call target' is altered to look like this: [some check] jne error_function call target I've done this by implementing a MachineFunctionPass that is instantiated and added to the PassManager in X86TargetMachine::addPreRegAlloc. In order to create the jne-instruction I need some BasicBlock
2010 Oct 20
1
[LLVMdev] MachineBasicBlock insertion and use/def list update
Hi all, I am still stumped on the same bug. Did anyone try to insert MachineBasicBlock into a MachineFunction? Any advice will be appreciated. Thanks a lot in advance. ~Bin ---------------------------------------------------------------------------------------------------------------------------- Thanks a lot Jeff. I changed the setNumber function call to
2009 Jul 01
0
[LLVMdev] Inserting nodes into SelectionDAG (X86)
On Jun 29, 2009, at 9:00 AM, Artjom Kochtchi wrote: > > Sorry to ask again, but I still can't get it right. > > The following code compiles and runs, but produces no instructions: > Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); > Ops.push_back(DAG.getConstant(1, MVT::i32)); > DAG.getNode(ISD::ADD, DAG.getVTList(MVT::i32), &Ops[0], Ops.size()); To read the
2009 Aug 02
0
[LLVMdev] code-altering Passes for llc
On Aug 2, 2009, at 7:09 AM, Artjom Kochtchi wrote: > > Greetinigs, > > I am extending llc to include runtime checks for calls (in X86). So > a call > 'call target' is altered to look like this: > > [some check] > jne error_function > call target > > I've done this by implementing a MachineFunctionPass that is > instantiated > and added
2008 Jul 08
3
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Evan, Evan Cheng wrote: > The patch looks great. But I do have one comment: > > +let usesCustomDAGSchedInserter = 1 in { > + let Uses = [CR0] in { > + let Uses = [R0] in > + def ATOMIC_LOAD_ADD_I32 : Pseudo< > > The "let Uses = [R0]" is not needed. The pseudo instruction will be > expanded like this later: > > + BuildMI(BB,
2009 Jun 26
2
[LLVMdev] Inserting nodes into SelectionDAG (X86)
Thank you for your help. I think I managed to create the instruction I wanted: // mov eax, 41 Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), DAG.getConstant(41, MVT::i32), InFlag); InFlag = Chain.getValue(1); I don't understand though what InFlag is for. As I read the code, it even remains uninitialized when first passed to some node creation method.
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Look for createVirtualRegister. These are examples in PPCISelLowering.cpp. Evan On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > Hi Evan, > > Evan Cheng wrote: >> The patch looks great. But I do have one comment: >> >> +let usesCustomDAGSchedInserter = 1 in { >> + let Uses = [CR0] in { >> + let Uses = [R0] in >> + def ATOMIC_LOAD_ADD_I32 :
2006 Oct 15
2
[LLVMdev] Implicit defs
Hi Chris, Thanks for your response. > On Sat, 14 Oct 2006, Roman Levenstein wrote: > > Is it possible to dynamically define implicit defs for some > > instructions? > > Yes! This is what explicit operands are :). Specifically, if you > want to > vary on a per-opcode basis what registers are used/def'd by the > instruction, you can just add those registers
2006 Oct 16
0
[LLVMdev] Implicit defs
On Sat, 14 Oct 2006, Roman Levenstein wrote: >> On Sat, 14 Oct 2006, Roman Levenstein wrote: >>> Is it possible to dynamically define implicit defs for some >>> instructions? >> >> Yes! This is what explicit operands are :). Specifically, if you >> want to >> vary on a per-opcode basis what registers are used/def'd by the >> instruction,
2009 Jun 27
0
[LLVMdev] Inserting nodes into SelectionDAG (X86)
On Jun 26, 2009, at 4:49 AM, Artjom K. wrote: > > Thank you for your help. > > I think I managed to create the instruction I wanted: > > // mov eax, 41 > Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), > DAG.getConstant(41, MVT::i32), InFlag); > InFlag = Chain.getValue(1); > > I don't understand though what InFlag is for. As I read the