similar to: [LLVMdev] LLVM code target dependent generator question

Hello, I am new to LLVM and I am not sure whether I am writing to the right distribution list or not. Please let me know if this is not the right distribution list. Question: - I am having hard time lowering ADD instructions for different purposes. Basically, I want to have different machine instruction for pointer addition vs scalar addition. I am having hard time mapping LLVM add to my machine

Hello, I'm new to LLVM and I'm using it to translate from LLVM to another language rather than emitting actual machine code. The target language has instructions that operate on pointers which aren't naturally exposed in LLVM. Here's what I've done to add pointer support for an instruction called PADD that takes a pointers and an offset and returns the new pointer value:

Are there any other patterns in your TD file? If so, then one of the ones before this pattern will match everything, and this pattern will never be matched. -bw On Jul 3, 2009, at 8:27 PM, Javier Martinez wrote: > Hello, > > I'm new to LLVM and I'm using it to translate from LLVM to another > language rather than emitting actual machine code. The target language > has

Hi Bill, Yes, there are other patterns. I tried commenting out all the other instructions definitions and I still get this error. After debugging TblGen I found that the second pattern is being generated as a variant of the first. I think the reason is that the PADD instruction is inheriting the commutative property from ADD defined inTargetSelectionDAG.td. The variant ends up being the same

That's kind of strange. It might be some type of "default". However, you probably don't want to turn off the "commutative" property, unless it really isn't commutative. I know it's painful, but it might be best just to slog through the TableGen code in a debugger, and see why it is that your stuff inherits properties from the ADD in

This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but

Hello, Everyone > TargetSelectoinDAG.td and then why the two versions are "identical" in > TableGen's mind. That's correct. The patterns are identical since the types of operands involved are the same. DAG pattern matching is done before regalloc, there are not regclasses actually at that point, thus both patterns tries to select the same thing... -- With best regards,

Hi Arjen 2007/7/28, Arjen de Korte <adkorte-guest at alioth.debian.org>: > Author: adkorte-guest > Date: Sat Jul 28 16:45:04 2007 > New Revision: 1029 > > Log: > Add Belkin F6C1200-UNV (older model) to supported devices. > > Apparently this is (internally) identical to the F6C1100-UNV. Not surprisingly, they also share the same productid (1100). It also seems to come

Bus 003 Device 002: ID 050d:1100 Belkin Components # /lib/nut/usbhid-ups -a belkin Network UPS Tools: 0.28 USB communication driver 0.28 - core 0.30 (2.2.0-) No matching HID UPS found Hmm best to stick with 2.0.4. Justin.

Bus 003 Device 002: ID 050d:1100 Belkin Components # /lib/nut/usbhid-ups -a belkin Network UPS Tools: 0.28 USB communication driver 0.28 - core 0.30 (2.2.0-) No matching HID UPS found Hmm best to stick with 2.0.4. Justin.

Hello LLVM Developers, We are working on extending currently available register rematerialization to include cases where sequence of multiple instructions is required to rematerialize a value. We had a discussion on this in community mailing list and link is here: http://lists.llvm.org/pipermail/llvm-dev/2016-September/subject.html#104777 >From the above discussion and studying the code we

I ran into an LLVM/Clang crash when attempting to do the following: 1. Build Clang from the release/9.x branch source. 2. Use the Clang from (1) to build clangd on the release/9.x branch, with LLVM_ENABLE_MODULES=On. I wrote a script to reproduce the crash: https://gist.github.com/modocache/ac366ca9673b93bb21e75d3e72162608 At the above URL, you'll find a script `repro.sh` that reproduces

hi cant get wine compiled, tried the wineinstall script as user, these are the last lines :( Preparing to install default Wine registry entries... Installing default Wine registry entries... ./wineinstall: line 648: 28561 Segmentation fault $REGEDIT $DEFREG >/dev/null Registry install failed. permissions of /dev/null are 777 any ideas are welcome

Hi, We're having an issue with TailDuplication in our out-of-tree target and it's this PHI-node that seems to be the cause of the trouble: %vreg2<def> = PHI %vreg0, <BB#2>, %vreg1, <BB#3>; rN:%vreg2 aNlh_0_7:%vreg0 aNlh_rN:%vreg1 Note that the defined %vreg2 has register class "rN" while the read %vreg0 has register class "aNlh_0_7".

Hi, I have a case that for pointer with address space attribute, pointer arithmetic is not work. For example, -bash-4.4$ cat test.c #define __user __attribute__((address_space(1))) void __user * test(void __user *arg) { #ifdef ADD return arg + 4; #else return arg; #endif } -bash-4.4$ -bash-4.4$ clang -g -c test.c -bash-4.4$ clang -g -c -DADD test.c clang-10: ../lib/IR/Instructions.cpp:2749:

I forgot the -DADD flag earlier but the result did not change: https://godbolt.org/z/NPcn22 ________________________________________ From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Doerfert, Johannes via llvm-dev <llvm-dev at lists.llvm.org> Sent: Wednesday, October 30, 2019 20:18 To: LLVM Developers Mailing List; Y Song Cc: Alexei Starovoitov Subject: Re: [llvm-dev]

Thanks for the detailed info! The problem was that I tried without assertions and didn't inspect the IR closely as it contained this, for now, illegal instruction: %6 = bitcast i8* %5 to i8 addrspace(1)* This is clearly a clang error. I suggest opening a bug report, or sending the reproducer to cfe-dev at llvm.lists.org so someone will take a look that has more clang experience. @Matt Do