similar to: [LLVMdev] Loop alignment

Asm printer. Evan On Jun 16, 2009, at 2:52 PM, David Greene wrote: > For the X86 target, where is the code that spits out > alignment directives and/or code for loops as determined by the > LoopAligner pass? > > -Dave > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu

On Wednesday 17 June 2009 00:11, Evan Cheng wrote: > Asm printer. Yes, but where? I can't find it. What do I need to search for? -Dave

> On Wednesday 17 June 2009 00:11, Evan Cheng wrote: >> Asm printer. > > Yes, but where? I can't find it. What do I need to > search for? ViewVC is helpful :- http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/ Look at the X86IntelAsmPrinter.cpp file for code outputting the align, if its not there it maybe in the X86AsmPrinter.cpp file, meaning

Yep, I'm fixing it (and others) now. Good catch. Evan On May 22, 2008, at 4:59 PM, Dan Gohman wrote: > > On May 22, 2008, at 4:24 PM, Nicolas Capens wrote: >> >> >> Since I’m fairly new to LLVM I’m not entirely sure if this is really >> a bug or something I’m not doing correctly, or whether it’s already >> being addressed. The following thread appears to

Fixed. Evan On May 22, 2008, at 5:02 PM, Evan Cheng wrote: > Yep, I'm fixing it (and others) now. Good catch. > > Evan > > On May 22, 2008, at 4:59 PM, Dan Gohman wrote: > >> >> On May 22, 2008, at 4:24 PM, Nicolas Capens wrote: >>> >>> >>> Since I’m fairly new to LLVM I’m not entirely sure if this is really >>> a bug or

I have 24-bit integer operations as well as 24-bit floating point (s7.16) operations. The H/W supports load/store instructions, however, they does suggest us not to use these load/store instructions besides debugging purpose. That is to say, you can imagine we don't have load/store instructions, we don't have memory, we just have registers. I will run OpenGL shading laugnage programs on

This is similar to ATI's R300/R420 pixel shaders. I'm familiar with this hardware, but not really an LLVM expert (working on a code generator myself, but learning as I go). Do you have 24-bit integer operations, or just floating point? What about load/store? Are you looking to run large C programs with complex data structures, or just comparatively simple math functions (i.e. a

On Wednesday 23 January 2008 02:01, Evan Cheng wrote: > On Jan 22, 2008, at 12:23 PM, David Greene wrote: > > Evan, > > > > Can you explain the basic mechanics of the live interval splitting > > code? > > Is it all in LiveIntervalAnalysis.cpp under addIntervalsForSpills > > and child > > routines? What is it trying to do? > > It's splitting

Because each channel contains 24-bit, so.. what is the llvm::SimpleValueType I should use for each channel? the current llvm::SimpleValueType contains i1, i8, i16, i32, i64, f32, f64, f80, none of them are fit one channel (24-bit). I think I can use i32 or f32 to represent each 24-bit channel, if the runtime result of some machine instructions exceeds 23-bit (1 bit is for sign), then it is an

On Jan 23, 2008, at 2:40 PM, David Greene <dag at cray.com> wrote: > On Wednesday 23 January 2008 02:01, Evan Cheng wrote: >> On Jan 22, 2008, at 12:23 PM, David Greene wrote: >>> Evan, >>> >>> Can you explain the basic mechanics of the live interval splitting >>> code? >>> Is it all in LiveIntervalAnalysis.cpp under

On Oct 18, 2007, at 1:52 PM, Chuck Rose III wrote: > > Here are the instructions for evaluateDependents. The JITter > hasn’t compiled foo yet. What’s confusing to me is why did my > movups suddenly become a movaps? All the stores and loads have > align 1 on them. Hi Chuck, I believe this is a bug but am unable to reproduce it with the test case you've provided. I

Hello LLVMers, High order bit: Presence of a called function is causing a store on an unrelated vector to generate an aligned store rather an unaligned one despite unaligned store being indicated in the associated StoreInst. Details: I pulled down the latest source, so this is something I'm finding with the current LLVM. I'm hoping you'll have an idea what's

On Nov 22, 2008, at 11:03 AM, Wei wrote: > I have 24-bit integer operations as well as 24-bit floating point > (s7.16) operations. > > The H/W supports load/store instructions, however, they does suggest > us not to use these load/store instructions besides debugging purpose. > That is to say, you can imagine we don't have load/store instructions, > we don't have

Hi Jim/Evan, We had this discussion last year, and I think it's time we revisited this issue again. Many of us (Linaro, ARM, CodeAurora) have been using the ARM integrated assembler for compiling large projects, the test-suite, buildbots, and there seem to be no bug pending on them, with the obscure cases being a few unsupported directives, some of which are already being implemented, while

> The machines I worked with didn't support any integer ops, but GLSL > let us get by with "emulated" 16 bit integers (storing and operating > on them as floating point; divides required truncation after the op - > that sort of thing). Although my platform indeed supports integer operations, however, it only supports integer +,-,*, not /. The document says if I need to

I was wondering if somebody could help me with an Apache re-write rule. Apparently CentOS 6.8 is running apache-2.2.15-53. I am trying to redirect all pages except for two pages. The apache rewrite directives in the httpd config are: RewriteEngine on RewriteCond %{REQUEST_URI}!^/test/ RewriteCond %{REQUEST_URI}!^/my-folder/ RewriteRule (.*) http://www.newdomain.com/$1 [R=301,L] These commands

On Feb 2, 2009, at 12:12 PM, David Greene wrote: > On Monday 02 February 2009 13:14, Evan Cheng wrote: > >> I am sorry I don't really follow it. Is this what you are describing? >> >> %v1177 = undef >> ... >> loop: >> ... >> %v1176 = op ... >> = %v1177 >> %v1177 = %v1176 >> jmp loop >> >> Why is not

On Feb 2, 2009, at 1:05 PM, David Greene wrote: > On Monday 02 February 2009 14:29, Evan Cheng wrote: >> On Feb 2, 2009, at 12:12 PM, David Greene wrote: >>> On Monday 02 February 2009 13:14, Evan Cheng wrote: >>>> I am sorry I don't really follow it. Is this what you are >>>> describing? >>>> >>>> %v1177 = undef

Evan Cheng <evan.cheng at apple.com> writes: > David, we cannot accept the 'multidef' keyword. Please revert it. Working on it now. > We appreciate you thinking ahead about MIC, but we are against the > massive refactoring and complicated abstraction scheme. We'll never > accept those patches. How about a less massive and complicated scheme? I think we can make

After wasting an inordinate amount of time trying to get test-suite to run on arm-apple-darwin so I could reproduce your results, attached is a patch that fixes the small copy&paste error of having 8-byte alignment for stack-allocated f64s instead of the proper 4-byte. I've updated the patch to the top of trunk changes as well. deep On Fri, Feb 27, 2009 at 8:31 PM, Sandeep Patel