similar to: [LLVMdev] Arm port

My goal is to have Cortex-A9 support complete in far less than three months. I've recently gotten some additional help toward that goal, so the pace should pick up soon. As far as compiler texts, there are many newer texts to recommend as just about all the major optimization passes are done differently after SSA-form appeared in about 1991. However, for adding Cortex-A8 support, I don't

Christophe Avoinne wrote: > Hi, > > - Cortex-A8 needs a specific instruction scheduler as dual issue forces > you to interleave some instructions to allow to run two instructions in > the same cycle for the best performance (Cortex-A9 is out-of-order so > dual issue is not an issue (!) for performance). > - Cortex-A8/A9 have several useful new instructions : for instance,

Sandeep Patel wrote: > My goal is to have Cortex-A9 support complete in far less than three > months. I've recently gotten some additional help toward that goal, so > the pace should pick up soon. > > As far as compiler texts, there are many newer texts to recommend as > just about all the major optimization passes are done differently > after SSA-form appeared in about

Bob Wilson wrote: > On May 20, 2009, at 1:38 PM, Chuck Robey wrote: >> Hmm. Well, my motivation is that I recently bought a Pandora (it >> has the >> Cortex-A8). It's not going to arrive here for a couple more months, >> I think. >> When it does finally arrive, I want to be able to immediately begin >> work on >> replacing the Linux that

Sandeep Patel wrote: > The Nokia N800 is an OMAP 2420 which is an ARM11. > > If you want an OMAP 3530 today, I think the cheapest route is the Beagleboard. Yeah, I see that now, about the N800. About the BeagleBoard, if you're going after an equivalent # of peripherals (screen and keyboard are things I wanted) then, really, I think that the Pandora is cheapest. I will say, without

The Nokia N800 is an OMAP 2420 which is an ARM11. If you want an OMAP 3530 today, I think the cheapest route is the Beagleboard. deep On Wed, May 20, 2009 at 3:13 PM, Chuck Robey <chuckr at telenix.org> wrote: > Bob Wilson wrote: >> On May 20, 2009, at 1:38 PM, Chuck Robey wrote: >>> Hmm.  Well, my motivation is that I recently bought a Pandora (it >>> has the

If this is the wrong list, please correct me, thanks. I'm trying to get a bit more information about the Arm backend for llvm. The precise processor I'm interested in is the TI OMAP3530 (the Cortex-A8 is the main CPU, along with other processors onboard the chip). I did see that the backend for Arm has support for the V6, but I'm thinking (I could be wrong) that the Cortex-A8 is

Sandeep Patel wrote: > I am currently working on support for the Cortex-A9, but as all > compiler testing is more easily done on an Cortex-A8 today, A8 support > is implicit. > > What specific ISA changes are you most interested in? Are you able to > develop patches if we coordinate which areas to work on? Hmm. Well, my motivation is that I recently bought a Pandora (it has

On May 20, 2009, at 1:38 PM, Chuck Robey wrote: > Hmm. Well, my motivation is that I recently bought a Pandora (it > has the > Cortex-A8). It's not going to arrive here for a couple more months, > I think. > When it does finally arrive, I want to be able to immediately begin > work on > replacing the Linux that comes pre-installed with FreeBSD-arm. Hi Chuck,

I am currently working on support for the Cortex-A9, but as all compiler testing is more easily done on an Cortex-A8 today, A8 support is implicit. What specific ISA changes are you most interested in? Are you able to develop patches if we coordinate which areas to work on? deep On Wed, May 20, 2009 at 12:19 PM, Chuck Robey <chuckr at telenix.org> wrote: > If this is the wrong list,

Sandeep Patel wrote: > My goal is to have Cortex-A9 support complete in far less than three > months. I've recently gotten some additional help toward that goal, so > the pace should pick up soon. > > As far as compiler texts, there are many newer texts to recommend as > just about all the major optimization passes are done differently > after SSA-form appeared in about

I tried to speed up Dhrystone on ARM Cortex-A8 by optimizing the memcpy intrinsic. I used the Neon load multiple instruction to move up to 48 bytes at a time . Over 15 scalar instructions collapsed down into these 2 Neon instructions. fldmiad r3, {d0, d1, d2, d3, d4, d5} @ SrcLine dhrystone.c 359 fstmiad r1, {d0, d1, d2, d3, d4, d5} It seems like this should be faster. But I did

On Nov 9, 2009, at 5:59 PM, David Conrad wrote: > On Nov 9, 2009, at 7:34 PM, Neel Nagar wrote: > >> I tried to speed up Dhrystone on ARM Cortex-A8 by optimizing the >> memcpy intrinsic. I used the Neon load multiple instruction to move >> up >> to 48 bytes at a time . Over 15 scalar instructions collapsed down >> into these 2 Neon instructions. Nice. Thanks

Motivation At the moment, when targeting armv7a, clang defaults to generate code as if -mcpu=cortex-a8 was specified. When targeting armv8a, it defaults to generate code as if -mcpu=cortex-a53 was specified. This leads to surprising code generation, by the compiler optimizing for a specific micro-architecture, whereas the intent from the user was probably to generate code that is

Hi Renato, >I was recently investigating the build bot infrastructure and noticed >that the arm-linux target is failing for quite a long time. I believe >that it means ARM code is not executed all that often in LLVM tests, >is that correct? >We were wondering what kind of support we could give to make sure ARM >code is correct and don't regress, specially before releases (I

Thanks for everyone giving their feedback! I saw pretty unanimous support for making -mcpu=generic the default and making -mcpu=generic schedule for an in-order CPU (Cortex-A8 in this case). I'll be making those changes shortly. I think the comments also make clear that it's less obvious whether we'd want -mcpu=native to become a default. It's probably good for some use cases, but

On 8 April 2011 11:21, Xerxes Rånby <xerxes at zafena.se> wrote: > Hope this will help fix the regressions Hi Xerxes, I see you're the owner of that board, thanks for the detailed description of the tests. By what you say, I think that the board itself is serving its purpose, and 2.9 only got that regression because it wasn't fixed it in time. My intention was to know what can

IMPORTANT! IMPORTANT! IMPORTANT! We will be branching for the 3.1 release on April 16th! :-) This gives us a little over two weeks to get the trees into the most stable condition we can. What this means for you: All major features for the 3.1 release should be finished or near completion by the April 16th. After April 16th, we will accept only bug fixes and patches which do not change the

Renato, >> cortex-a9 sounds fine. It'd be cool if we verified those binaries >> run on a cortex-a8 and a cortex-a15, too. It'd be very, very strange >> if they didn't, but hey, catching very, very strange problems is what >> release testing is for, right? :) > Actually, this is a good idea, I'll set up a Beagle as a buildbot and see > what happens to

Understood, Same architecture, different micro-arch (implementation). Could this be the case that vmlx-forwarding make senses for SWIFT and not for ARM Cortex-A9 implementation ? It is enabled by default when -mcpu=cortex-a9 is used but test have made show significant improvements when disabled for cortex-A9 (STEricsson Nova platform). Best Regards Seb From: David Tweed [mailto:david.tweed at