similar to: [LLVMdev] support for division by constant in APInt

Displaying 20 results from an estimated 5000 matches similar to: "[LLVMdev] support for division by constant in APInt"

2009 Apr 25
0
[LLVMdev] support for division by constant in APInt
On Apr 23, 2009, at 6:26 AM, Jay Foad wrote: > In lib/CodeGen/SelectionDAG/TargetLowering.cpp there are some > functions magic() and magicu() that support optimising division by a > constant. I'd like to use these functions in an LLVM FunctionPass that > I'm working on. The attached patch moves these functions out of > TargetLowering.cpp and into the APInt class, so that I
2009 Apr 27
2
[LLVMdev] support for division by constant in APInt
> The patch looks fine to me, does it pass regression tests etc? Yes, I've just run a successful "make" in the test-suite module. It took hours! Is there a smaller set of regression tests I could run for changes like this in future? Thanks, Jay.
2009 Apr 27
0
[LLVMdev] support for division by constant in APInt
On Mon, Apr 27, 2009 at 9:45 AM, Jay Foad <jay.foad at gmail.com> wrote: > > The patch looks fine to me, does it pass regression tests etc? > > Yes, I've just run a successful "make" in the test-suite module. It > took hours! Is there a smaller set of regression tests I could run for > changes like this in future? "make unittests" is a smaller set
2009 Apr 27
1
[LLVMdev] support for division by constant in APInt
On Apr 27, 2009, at 11:33 AM, Misha Brukman wrote: > On Mon, Apr 27, 2009 at 9:45 AM, Jay Foad <jay.foad at gmail.com> wrote: > > The patch looks fine to me, does it pass regression tests etc? > > Yes, I've just run a successful "make" in the test-suite module. It > took hours! Is there a smaller set of regression tests I could run for > changes like this
2017 Oct 07
2
Bug 20871 -- is there a fix or work around?
Ignore the suggested fix in my earlier post. How about this? diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 20c81c3..b8ebf42 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1632,10 +1632,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, if (!Subtarget.is64Bit()) { // These
2008 Dec 09
4
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Hi, Here is the next iteration of the patch. The only comment not addressed is this one: > It would be better to implement a target-independent check for > overflow for the "Legal" case (like how SADDO does). Hacker's > Delight > has some hints on how to do this. It's not easy for the signed case, > but is do-able. It can be lowered to a division + a branch,
2008 Dec 16
2
[LLVMdev] Shifts that use only 5 LSBs.
I'm working on a Target that only uses the 5 lsbs of the shift amount. I only have 32 bit registers, no 64 bit, so 64 bit math is emulated, LLVM doing the transformations whenever I can get it to. I think I'm seeing a case where it ultimately looks like a standard multiword shift (from e.g. Hacker's Delight) is being inline expanded that assumes at least 6 bits of the shift is
2018 Mar 30
0
Floor-integer-div and integer sign operations?
Hacker's Delight or this web page are probably the best references for tricks like this: https://graphics.stanford.edu/~seander/bithacks.html#CopyIntegerSign John On 03/30/2018 03:58 AM, edA-qa mort-ora-y via llvm-dev wrote: > I'm looking for ways to do some basic operations without using branches. > > The key operation I want is a floored/round-to-negative-infinity integer
2008 Dec 09
0
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
On Tue, Dec 9, 2008 at 6:11 AM, Zoltan Varga <vargaz at gmail.com> wrote: > Hi, > > Here is the next iteration of the patch. The only comment not > addressed is this one: > Thanks! It's looking good. >> It would be better to implement a target-independent check for >> overflow for the "Legal" case (like how SADDO does). Hacker's > Delight
2012 Jul 29
0
[LLVMdev] rotate
I can get clang/llvm to emit a rotate instruction on x86-64 when compiling C by just using -Os and the rotate from Hacker's Delight i.e., ====== #include <stdlib.h> #include <stdint.h> uint32_t ror(uint32_t input, size_t rot_bits) { return (input >> rot_bits) | (input << ((sizeof(input) << 3) - rot_bits)); } ====== Then compile with (assuming you are on OS
2008 Dec 09
3
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Hi, Attached is the final version of the patch, adding the requested FIXME. If this is ok, can somebody check it in ? thanks Zoltan On Tue, Dec 9, 2008 at 9:58 PM, Bill Wendling <isanbard at gmail.com> wrote: > On Tue, Dec 9, 2008 at 6:11 AM, Zoltan Varga <vargaz at gmail.com> wrote: >> Hi, >>
2008 Dec 09
0
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
On Tue, Dec 9, 2008 at 6:11 AM, Zoltan Varga <vargaz at gmail.com> wrote: >> It would be better to implement a target-independent check for >> overflow for the "Legal" case (like how SADDO does). Hacker's > Delight >> has some hints on how to do this. It's not easy for the signed case, >> but is do-able. > > It can be lowered to a division +
2008 Dec 17
0
[LLVMdev] Shifts that use only 5 LSBs.
On Tue, Dec 16, 2008 at 3:36 PM, Daniel M Gessel <gessel at apple.com> wrote: > I'm working on a Target that only uses the 5 lsbs of the shift amount. Okay, that's quite common... x86 is the same. > I only have 32 bit registers, no 64 bit, so 64 bit math is emulated, > LLVM doing the transformations whenever I can get it to. x86 is the same. > I think I'm seeing a
2008 Dec 09
0
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Applied. Thanks, Zoltan! -bw On Tue, Dec 9, 2008 at 1:12 PM, Zoltan Varga <vargaz at gmail.com> wrote: > Hi, > > Attached is the final version of the patch, adding the requested > FIXME. If this is ok, can > somebody check it in ? > > thanks > > Zoltan > > On Tue, Dec 9, 2008 at 9:58 PM,
2012 Jul 29
3
[LLVMdev] rotate
Nice! Clever compiler.. On 07/28/2012 08:55 PM, Michael Gottesman wrote: > I can get clang/llvm to emit a rotate instruction on x86-64 when compiling C by just using -Os and the rotate from Hacker's Delight i.e., > > ====== > #include<stdlib.h> > #include<stdint.h> > > uint32_t ror(uint32_t input, size_t rot_bits) > { > return (input>>
2010 Oct 22
0
[LLVMdev] Crash with llc and vector code
Hi, Compiling the simple following function with llv (LLVM 2.8) : define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) { %res = select <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x i32> %a, <4 x i32> %b ; ret <4 x i32> %res } gives : UNREACHABLE executed! 0 llc 0x0000000100927422 std::_Rb_tree<llvm::sys::Path,
2008 Dec 09
1
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Hi, The add.with.overflow instrinsics don't seem to work with constant arguments, i.e. changing the call in add-with-overflow.ll to: %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 0, i32 0) causes the following exception when running the codegen tests: llc: DAGCombiner.cpp:646: void<unnamed>::DAGCombiner::Run(llvm::CombineLevel): Assertion `N->getValueType(0) ==
2010 Oct 22
1
[LLVMdev] Crash with llc and vector code
Hi, Compiling the simple following function with llv (LLVM 2.8) : define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) { %res = select <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x i32> %a, <4 x i32> %b ; ret <4 x i32> %res } gives : UNREACHABLE executed! 0 llc 0x0000000100927422 std::_Rb_tree<llvm::sys::Path,
2011 May 06
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
Hello all, I am a LLVM newer who want to add a new backend(EBC) into LLVM. After coping the related files from another target and modifying it, I meet a problem when I build the project. The error message is as follows: ================================================================ [ 94%] Built target llvm-dis Linking CXX executable ../../bin/llvm-mc Undefined symbols:
2012 Jul 29
2
[LLVMdev] rotate
in C or C++, how can I get clang/llvm to try and do a "rotate". (want to test this code in the mips16 port) i.e. emit rotr node. tia. reed