similar to: [LLVMdev] Question from a passer-by

Hi all, I'd like to write an LLVM backend for TPA processor architecture as part of 2009's Google Summer of Code program. TPA processor is a new architecture that offers the possibility of high instruction-level parallelism with energy efficiency. TPA architecture partitions the work between the compiler and the hardware differently from RISC and CISC architectures. TPA architecture has

Hi Leslie, I suggest adding these 3 papers to your reading list. Register allocation for programs in SSA-form Sebastian Hack, Daniel Grund, and Gerhard Goos http://www.rw.cdl.uni-saarland.de/~grund/papers/cc06-ra_ssa.pdf Simple and Efficient Construction of Static Single Assignment Form Matthias Braun , Sebastian Buchwald , Sebastian Hack , Roland Leißa , Christoph Mallon , and Andreas

My apologies for the cross-posting. If you are a business or individual providing Voice over IP services in Canada then we encourage you to read this email carefully otherwise please disregard. ----- As you are most likely aware, the CRTC has undertaken the roll of regulating VoIP services in Canada and is currently conducting hearings with the goal of putting in place regulatory requirements

John, thanks for that hint. It did not kill the server by you are perfectly right. I changed this and restarted the "smb" and "nmb" deamons - unfortunately with the same result. When I watch e.g. the status with "swat" I see as follows after trying with: smbclient -U <user> -L win2k1 (what is strange since I connect as different user and not

On Fri, Apr 08, 2005 at 08:37:03AM -0700, Tanu Sharma wrote: > Regarding basic block size I wish to calculate both: > > - The number of bytecode bytes Use the llvm-bcanalyzer tool, it will tell you number of bytes per function and number of basic blocks. If you want number of bytes per basic block, check out what it does, and calculate basic blocks separately. > - The number of

I have joined my win2k client machines (win2k professional or win2k professional server) to my PDC. This worked fine and I did all recommended as e.g. in the HOWTO http://hr.uoregon.edu/davidrl/samba/samba-pdc.html#joining. So far I can also login localy to the win2k client machines using a local account and connect a network drive from the PDC using a valid account on the PDC (as given in the

On 2019-07-01 10:01, Warren Young wrote: > On Jul 1, 2019, at 8:26 AM, Valeri Galtsev <galtsev at kicp.uchicago.edu> wrote: >> >> RAID function, which boils down to simple, short, easy to debug well program. I didn't intend to start software vs hardware RAID flame war when I joined somebody's else opinion. Now, commenting with all due respect to famous person who

Hi all. Is anyone else seeing issues with OpenSSH being slow on OSX High Sierra? In the interests of better test coverage I set one up, however the OpenSSH tests take much longer on it than on much older machines with much slower CPUs. It seems to be due to the vendor-supplied libcrypto being about 20x slower at bignum operations than nominally the same version of LibreSSL compiled locally. If

> I am interested in working on a little architecture project that > involves modifying an ISA in some non-trivial ways and seeing what > impact it has on instruction frequencies (and other such metrics). > Clearly I'll need to hack on a compiler backend, and I thought that > LLVM might be a good choice since among mature compiler > infrastructures it's fairly young and

Thanks a lot Chris. Regarding basic block size I wish to calculate both: - The number of bytecode bytes - The number of machine code bytes for some target? TS Chris Lattner <sabre at nondot.org> wrote: On Thu, 7 Apr 2005, Tanu Sharma wrote: > Thanks for the reply, > > Actually I m aiming towards determining two values: > > - number of basic blocks in a program For

Hi all, I am currently compiling R to RISC-V64 CPU and I think I have discovered a NA propagation failure. How R implements NA (not available) and NaN (not-a-number) is explained in detail here: https://stat.ethz.ch/pipermail/r-devel/2014-February/068380.html. In short, according to my understanding of R's convention, any calculation involving NA but no NaN should result in NA (called NA

Hi Vadim, I am the book author of "Creating an LLVM Backend for the Cpu0 Architecture". Your question is right. More documents is good for programmer just like plentiful book in Linux Programming, even though the GCC backend compiler book is seldom. As you can see, I have let readers know how to write a RISC backend in my book but lack of the CISC backend features, like the complex

Hi all, I am proposing the integration of a backend targeting the RISC-V ISA. RISC-V is a free and open instruction set architecture that was originally developed at UC Berkeley. Future development of the ISA specification will be handled by the 501(c)(6) non-profit RISC-V Foundation and its members <https://riscv.org/membership/?action=viewlistings>. You can find much more information at

Sers! I recently strumbled across llvm-qemu (http://code.google.com/p/llvm-qemu/) which apparantly should be able to translate qemu supported architectures to LLVM IR (http://markmail.org/message/iyqzgtcux62wdhkb) to ease analysing binaries. Using LLVM for (dynamic binary) translations seems to be a great idea. However I haven't seen many approaches being made in that direction.

That would complicate instruction selection. Not worth it. Evan On Nov 8, 2007, at 1:10 AM, Duncan Sands wrote: >> Ok, so it turns out the labels do not have to be just before / after >> the divide. So we don't have to use the MVT::Flag hackery. However, >> the second label must be after the divide. I think the solution is to >> add a trapping version of DIV (and

On 11/6/20 12:39 PM, Sjoerd Meijer wrote: Hello Simon, Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear: ; Some examples: ; RISC-V V & VE(*): ; %mask = (splat i1 1) ; %evl = min(256, %n - %i) ; MVE/SVE : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() ; AVX: ; %mask = icmp (%i + (seq

Hello Everyone, for a small embedded System i would like to install CentOS, but it is a RISC System. So my Question is it possible to rebuild some SRPMs for RISC? Thanks in Advance Daniel -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 189 bytes Desc: Dies ist ein digital signierter Nachrichtenteil URL:

On Apr 1, 2009, at 9:53 PM, lu lu wrote: > Hi all, > I'd like to write an LLVM backend for TPA processor architecture as > part of 2009's Google Summer of Code program. Who is using the TPA processor? Is this generally useful, or specific to your research program? -Chris > > > TPA processor is a new architecture that offers the possibility of > high

> Ok, so it turns out the labels do not have to be just before / after > the divide. So we don't have to use the MVT::Flag hackery. However, > the second label must be after the divide. I think the solution is to > add a trapping version of DIV (and others) and the second label can > use its chain value as operand. How about a new "trapping" SDNode, which you

# Overview and background RISC-V is a free and open instruction set architecture. It is a modular specification, with a range of standard extensions (e.g. floating point, atomics, etc). New standard extensions are developed through RISC-V Foundation working groups. The specifications for such extensions (e.g. vector and bit manipulation) are publicly available, but are still in flux and won't