similar to: [LLVMdev] MSIL codegen

Hi Artur, Artur Pietrek wrote: > Hello, > > I work in Kalray (Montbonnot, France) and I'm PhD student at Universite > Joseph Fourier in Grenoble. > We want to use LLVM framework for MSIL code generation, which is part of > my thesis. > Currently I'm still reading LLVM's documentation and I've started > completing the MSIL backend for running on Mono.

On Fri, Aug 21, 2009 at 2:02 AM, Artur Pietrek<pietreka at gmail.com> wrote: > Hi All, > Since few days I observe weird change. > Consider the following C code > > char array[] = "0123456789"; > extern int test(char arr[], int size); > > int main(void) { >   return test(array-1, sizeof(array)-1); > } > > using clang frontend i get this: > >

Hi All, Since few days I observe weird change. Consider the following C code char array[] = "0123456789"; extern int test(char arr[], int size); int main(void) { return test(array-1, sizeof(array)-1); } using clang frontend i get this: %call = call i32 @test(i8* getelementptr inbounds ([11 x i8]* @array, i32 0, i32 -1), i32 10) ; <i32> [#uses=1] and using LLVM-GCC this: %1 =

On Fri, Aug 21, 2009 at 12:33 PM, Eli Friedman <eli.friedman at gmail.com>wrote: > On Fri, Aug 21, 2009 at 2:02 AM, Artur Pietrek<pietreka at gmail.com> wrote: > > Hi All, > > Since few days I observe weird change. > > Consider the following C code > > > > char array[] = "0123456789"; > > extern int test(char arr[], int size); > >

Hello all. is it possible to use LLVM to optimize existing .NET assemblies? Basically doing the following: - read in MSIL and convert into LLVM internal representation - perform global optimizations on LLVM internal representation - write out optimized MSIL using the existing LLVM backend I presume that the capability to convert MSIL into LLVM internal representation exists somewhere in VMKit.

Dear Rudiger, Rüdiger Klaehn wrote: > Hello all. > > is it possible to use LLVM to optimize existing .NET assemblies? > It's in theory possible. LLVM+VMKit already does it for Java classes. > Basically doing the following: > > - read in MSIL and convert into LLVM internal representation > - perform global optimizations on LLVM internal representation > - write

Hello, > As for the state of the MSIL backend of LLVM, I don't think it's for > production use yet. Assemblies have lots of information in them and > maintaining them during the MSIL -> LLVM -> MSIL translations should be > the hard part. This should be pretty hard. MSIL is definitely much more high level than LLVM, that's why significant portion of information will

Hi, Artur > // CallSites have equal signatures > bool MSILWriter::cmpCallSite(CallSite A, CallSite B) { >   return (getCallSiteFType(A)==getCallSiteFType(B) && >     A.getAttributes()==B.getAttributes()); > } As it is impossible to honour argument attributes in MSIL I don't see why you should compare attributes. You seems to have the same MSIL call signature for calls

Hi all, Just to inform that we have an open position for a compiler engineer: https://www.kalrayinc.com/compiler-engineer/ The position is in Grenoble, France. Regards, Sebastien Sébastien Le Duc CoreSW Team Manager <http://www.kalray.eu/> kalray_logo Kalray S.A. <http://www.kalray.eu> www.kalray.eu Phone : 06 84 43 07 00 sleduc at kalray.eu Follow us

Hi all, I am working on a target that has support for v4i16 vectors, and no support for v4i8 / v8i8 / v8i16 V4i8 is promoted to v4i16 which is nice V8i16 is split to 2 x v4i16 which is nice as well Now v8i8 is scalarized, which is not so nice. Ideally I would like v8i8 to be first promoted to v8i16 then split to 2xv4i16 (or split to 2xV4i8 then promoted to 2xv4i16) Is there a way to achieve

Hi Anton > > > The interesting for me part of the CallInst is printf(i8* noalias %0, i32 > > 123). > > I was diging in doxygen documentation but I really can't see the easy way > to > > compare those instructions and again finish with reinvented (but working) > > wheel ;). > Ah, sorry. I missed that you're doing variadic calls, not casting >

I updated DwarfDebug to use section offset, instead of hard coding 0, to handle LTO properly. r107202. Thanks for brining this up. - Devang On Tue, Jun 29, 2010 at 11:27 AM, Devang Patel <devang.patel at gmail.com> wrote: > DW_AT_stmt_list attribute's value is a section offset to the line no > info for current compilation unit. If there is only one  compilation > unit

On Aug 31, 2010, at 2:15 AM, Renato Golin wrote: > On 26 August 2010 09:32, Krister Wombell <kuwerty at gmail.com> wrote: >> I've also been looking at debugging with ELF and noticed the same problem as >> Renato. I just sent a patch to llvmcommits that fixes the problem. >> DW_at_stmt_list needs to emit a label(and therefore a relocation) for the >> offset

On Sat, May 16, 2009 at 5:09 PM, Anton Korobeynikov <anton at korobeynikov.info > wrote: > Hello, > > > As for the state of the MSIL backend of LLVM, I don't think it's for > > production use yet. Assemblies have lots of information in them and > > maintaining them during the MSIL -> LLVM -> MSIL translations should be > > the hard part. > This

On Thu, Apr 15, 2010 at 3:40 AM, Artur Pietrek <pietreka at gmail.com> wrote: > Hi all > Ups, I'm really sorry for that previous message, I've sent it by mistake. > > So let me write it once more. > > I've been working for some time now on a backend for our CPU. However I > couldn't figure out how to implement some stuff. > I'd appreciate your help

Hi Artur, The Thumb2 target (in lib/Targets/ARM/ARMInstrThumb2.td) materializes a 32-bit constant by a two-instruction sequence to load the low and high half-words. It's not pretty, but it works. The pattern is at the bottom of the file. Regards, -Jim On Oct 6, 2009, at 5:10 AM, Artur Pietrek wrote: > Hi all, > I'm working on my own backend for a custom CPU. I have defined

Le 20 oct. 2009 à 10:27, Artur Pietrek a écrit : > Hi Jean-Daniel > > On Mon, Oct 19, 2009 at 3:24 PM, Jean-Daniel Dupas <devlists at shadowlab.org > > wrote: > > Le 19 oct. 2009 à 15:05, Kenneth Uildriks a écrit : > FWIW, there is a LLVM bar camp planed in Paris the next month: > > http://barcamp.org/LLVM%20BarCamp%20Paris (French web page) > > > --

Hey there, Searching via the web is not producing answers.... So I thought I would ask the gods of llvm. :-) I'd like to experiment with the llc in conjunction with msil. but I am running into this error: llc-mp-2.9 test.ll -march=msil /opt/local/libexec/llvm-2.9/bin/llc: error: invalid target 'msil'. the version string is: llc-mp-2.9 --version Low Level Virtual Machine

DW_AT_stmt_list attribute's value is a section offset to the line no info for current compilation unit. If there is only one compilation unit generated per .o file then it is always zero. What kind of errors are you seeing ? - Devang On Tue, Jun 29, 2010 at 9:02 AM, Artur Pietrek <pietreka at gmail.com> wrote: > Hi all, > While implementing debug info for our backend, we've

Hi,Could someone explain to me how the sign/zero extensions in LLVM work, please? If I understood correctly, the int type in LLVM doesn't keep the information about signedness of an int. So the question is how can I know if instructions like Load or Trunc should be signed or not? I guess that at least ARM backend produces sign extended load so if someone could point me to the code where it