similar to: [LLVMdev] DAGCombiner Patch: Allow targets to do combine first.

Displaying 20 results from an estimated 8000 matches similar to: "[LLVMdev] DAGCombiner Patch: Allow targets to do combine first."

2009 Feb 19
0
[LLVMdev] Possible DAGCombiner or TargetData Bug
I agree, that doesn't look right. It looks like this is what was intended: Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 65000) +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (working copy) @@ -4903,9 +4903,9 @@ // resultant store does not need a higher alignment than
2007 Jun 19
0
[LLVMdev] DAGCombiner: (S|U)REM
hi, thanks for your answer. On Mon, 2007-06-18 at 23:25 -0700, Chris Lattner wrote: > On Mon, 18 Jun 2007, Chris Lattner wrote: > > On Thu, 14 Jun 2007, Dietmar Ebner wrote: > >> currently, the DAGCombiner unconditionally converts > >> (DAGCombiner::visit(U|S)REM) expressions of the form X % C for constants > >> C into X-X/C*C. this makes sense in certain
2013 Oct 03
2
[LLVMdev] Question about DAGCombiner::MatchRotate function
Hi all, While I test "clang-tests/gcc-4_2-testsuite/src/gcc.c-torture/execute/20020226-1.c", I faced something wrong with "DAGCombiner::MatchRotate" function. This function tries to consume some patterns and generate "ROTL" or "ROTR" dag node as following comments: "DAGCombier::MatchRotate" function in DAGCombiner.cpp Pattern1 // fold (or
2009 Feb 20
0
[LLVMdev] Possible DAGCombiner or TargetData Bug
On Feb 20, 2009, at 3:05 PM, David Greene wrote: > On Wednesday 18 February 2009 21:43, Dan Gohman wrote: >> I agree, that doesn't look right. It looks like this >> is what was intended: >> >> Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp >> =================================================================== >> ---
2018 Mar 06
0
Heap Exhaustion during 'DAGCombiner::Run'
Martin: It sounds like you are doing is more akin to shuffle selection than fusion and therefore it's a better fit for instruction selection than DAGCombining. Try movign it to <Target>ISelDAGToDAG's Select (or potentially PreprocessISelDAG). Th -Nirav On Tue, Mar 6, 2018 at 4:05 PM Martin J. O'Riordan <MartinO at theheart.ie> wrote: > We discovered what is
2009 Jan 28
0
[LLVMdev] DAGCombiner rant
Hi Scott, I'm not clear on what you're saying here; some of your points below seem to be contradictory. The advice to use target-independent nodes when feasible seems sound to me, so I wrote up a comment about it in SelectionDAGNodes.h. If you can formulate your thoughts in the form of specific documentation changes, that would be helpful. In theory, DAGCombiner is supposed to check if
2011 Aug 26
0
[LLVMdev] Dead node removal in DAGCombiner
Hi Akira, > Is this piece of code in DAGCombiner::visitLOAD removing a dead node? > > 06155 if (N->use_empty()) { > 06156 removeFromWorkList(N); > 06157 DAG.DeleteNode(N); > 06158 } yes. > If it is, is there a reason it doesn't push its operands to the work > list as done in line 974-975? > > 00970 // If N has no uses,
2011 Apr 15
1
[LLVMdev] Valid debug information being deleted by DAGCombiner
Thanks Devang. Is there any plan on making this implicit in the node creation? Or instead of using DebugLoc in SelectionDAG, use SDDbgValue's instead, or embedding the SDDbgValue in the debug loc itself somehow? This seems like something that shouldn't have to be handled on a case by case basis in the backends. Your thoughts? Thanks, Micah From: Devang Patel [mailto:dpatel at
2012 Aug 27
0
[LLVMdev] Illegal node introduced by DAGCombiner after legal phase
Borja, In this situation, you need to find the place where shl is generated and add a check to see if shl is legal before allowing it to do the transform. Micah From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Borja Ferrer Sent: Sunday, August 26, 2012 11:49 AM To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] Illegal node introduced by DAGCombiner after
2020 Mar 19
2
large slowdown in DAGCombiner::MergeConsecutiveStores
Hello all, We are seeing a large compiler performance regression in moving from LLVM 6.0.1 to 8.0.1. We have a long function (~50000 instructions) that used to compile in about a minute but now takes at least an hour. All the time is in MergeConsecutiveStores, I believe due to super-linear behavior in analyzing very long chains of stores. For example, this change makes the problem go away: ```
2009 Dec 25
1
[LLVMdev] SoftenSetCCOpernads in LegalizeFloatTypes.cpp
On Mon, 2009-10-05 at 16:54 -0700, Eli Friedman wrote: > On Mon, Oct 5, 2009 at 11:11 AM, Sanjiv Gupta > <sanjiv.gupta at microchip.com> wrote: > > Sanjiv Gupta wrote: > >> Sanjiv Gupta wrote: > >> > >>> Duncan Sands wrote: > >>> > >>> > >>>> Hi Sanjiv, I think a lot of the softening code assumes you are
2009 Feb 20
2
[LLVMdev] Possible DAGCombiner or TargetData Bug
On Wednesday 18 February 2009 21:43, Dan Gohman wrote: > I agree, that doesn't look right. It looks like this > is what was intended: > > Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp > =================================================================== > --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (revision 65000) > +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
2011 Aug 26
2
[LLVMdev] Dead node removal in DAGCombiner
Is this piece of code in DAGCombiner::visitLOAD removing a dead node? 06155 if (N->use_empty()) { 06156 removeFromWorkList(N); 06157 DAG.DeleteNode(N); 06158 } If it is, is there a reason it doesn't push its operands to the work list as done in line 974-975? 00970 // If N has no uses, it is dead. Make sure to revisit all N's operands once
2007 Jun 14
2
[LLVMdev] DAGCombiner: (S|U)REM
hi, currently, the DAGCombiner unconditionally converts (DAGCombiner::visit(U|S)REM) expressions of the form X % C for constants C into X-X/C*C. this makes sense in certain cases where the div/mul logic will simplify X/C*X but is counterproductive in general, especially if the multiply is expensive. also, this doesn't allow targets to custom lower rem operations. shouldn't this
2018 Mar 06
2
Heap Exhaustion during 'DAGCombiner::Run'
We discovered what is happening. SDAGCombiner essentially looks at various combinations of nodes to do with vectors, and when it can, it creates a vector shuffle. The problem is, that our vector shuffle lowering builds new trees with vector element, or vector sub-vector insert sequences. The generic DAGCombiner, reconstructs these into a new shuffle, and so the loop continues - we reduce it,
2011 Jul 27
0
[LLVMdev] Avoiding load narrowing in DAGCombiner
On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson <johnso87 at crhc.illinois.edu> wrote: > Hi All, >     I'm writing a backend for a target which only supports 4-byte, > 4-byte-aligned loads and stores.  I custom-lower all {*EXT}LOAD and > STORE nodes in TargetISelLowering.cpp to take advantage of all alignment > information available to the backend, rather than treat each
2007 Jun 19
0
[LLVMdev] DAGCombiner: (S|U)REM
On Thu, 14 Jun 2007, Dietmar Ebner wrote: > currently, the DAGCombiner unconditionally converts > (DAGCombiner::visit(U|S)REM) expressions of the form X % C for constants > C into X-X/C*C. this makes sense in certain cases where the div/mul > logic will simplify X/C*X but is counterproductive in general, > especially if the multiply is expensive. also, this doesn't allow >
2009 Jan 26
2
[LLVMdev] DAGCombiner rant
Yes, it was I who put that rant in the commit log and it's justified. Worse, it's unreasonable to actually go through all of DAGCombiner's code and check to see if certain kinds of constants, e.g., i64, are legal during a particular phase of DAGCombiner. DAGCombiner does good work and the backends are supposed to be good citizens. CellSPU is certainly trying to be a good citizen, no
2009 Jun 29
4
[LLVMdev] llvmc for PIC16
Mikhail Glushenkov wrote: > Hi Sanjiv, > > 2009/6/18 Sanjiv Gupta <sanjiv.gupta at microchip.com>: > >> Hi Mikhail, >> Thanks for your wonderful help so far. I have few more questions to ask: >> >> How do I modify the driver to pick tools from where the driver itself >> resides, rather than from the PATH? >> Do I need to write some C++ code
2009 Jul 16
0
[LLVMdev] llvm-ld -disable-opt behavior.
On Wed, Jul 15, 2009 at 7:29 PM, sanjiv gupta<sanjiv.gupta at microchip.com> wrote: > On Wed, 2009-07-15 at 10:37 -0700, Devang Patel wrote: >> On Wed, Jul 15, 2009 at 9:32 AM, sanjiv gupta<sanjiv.gupta at microchip.com> wrote: >> > Consider the example command line below >> > >> > $ llvm-ld -disable-opt hello.bc -l std -o hello.out >> >