similar to: [LLVMdev] Equality Saturation

I was wonderring if there is any quick way to check how many virtual registers are live-in at any give instruction of a function? Right now my understanding is that I would have to calculate the gen, kill, in and out sets and iterate over the entire functions CFG until the sets stop changing. Thanks _________________________________________________________________ Express your personality

Hello, a local prison contacted us regarding some calling card solution. they need 4 E1s to serve 120 rooms in that prison. we are planning on using 4 servers to serve the calls and one for the database servers' specifications are: 2.8 Dual Core Proccessors 2 GB Ram 160 Sata Drive each server will be provided with 1 E1 card Questions are: 1- will those servers be able to handle that ammount

Is there a list anywhere of the DTrace FBT provider calls for each version of Solaris since the Nevada build that hosed the DTrace Toolkit. I have no issue with rewriting what I need, but I am hoping to stave off having to look at all the source code to find everything. I know there is a new provider under development, but I need to be able to program DTrace routines for all the updates in

Thanks for the response. Should I create a small prototype of equality saturation as an LLVM pass so that there can be some concrete discussion on this? I'd love pointers. Thanks, Siddharth On Wed 6 Sep, 2017, 23:35 John Regehr via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Equality saturation is very cool work and Ross Tate mentioned to me that > he'd be happy to chat

Hello all, I've seen some discussion that InstCombine is "too general" and that llvm should implement a proper graph rewrite mechanism: Link to llvm-dev discussion about this: http://lists.llvm.org/pipermail/llvm-dev/2017-May/113219.html, Link to review where this came up (and I first heard about it): https://reviews.llvm.org/D37195. I wanted to understand what the current issues

Hi, I have completed enough of the Nios2 code generator that I think it is appropriate to bring it into the source tree. What is the best approach to take? It all sits in one directory, of course: lib/Targets/Nios2. Besides that directory, the only other change I've made is to configure. The code generator is complete, but requires more testing. How should I proceed? Should I commit

I'm trying to implement *MUL_LOHI for my processor. My processor has mulxss (e.g.) that gives the 32 high bits of a 64 bit multiply. I tried this in ios2ISelDAGToDAG.cpp: /// Mul/Div with two results case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: { SDValue Op1 = Node->getOperand(0); SDValue Op2 = Node->getOperand(1); AddToISelQueue(Op1);

Chris Lattner wrote: > On Dec 21, 2007, at 1:08 PM, Richard Pennington wrote: > >> I'm a little further along now. I've started to put together a simple >> driver for Elsa and LLVM that I'm calling "ellsif" (cute name, I think >> it works). >> >> The file being compiled is a "printf" function. Here are timing >> results

On Dec 22, 2007, at 2:40 AM, Richard Pennington wrote: > Does Elsa provide an advantage over g++? For me, understanding it is a > big plus. ;-) In addition, Elsa has a Berkeley-like license which I > prefer. Ok. If you're not planning on extending the front-end, understandability doesn't really matter ;-). I get where you're coming from though! > Since I only

> Date: Mon, 2 Mar 2009 13:41:45 -0800 > From: eli.friedman at gmail.com > To: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Tight overlapping loops and performance > > Hmm, on my computer, I get around 2.5 seconds with both gcc -O3 and > llvm-gcc -O3 (using llvm-gcc from svn). Not sure what you're doing > differently; I wouldn't be surprised if it's

Eli Friedman wrote: > I haven't looked at the rest of the email carefully, but why aren't > you just implementing MULHU and MULHS? There's no point to > implementing the *MUL_LOHI variants if the processor doesn't have > them. I have implemented MULHU and MULHS. But if I take out my *MUL_LOHI stuff, the error I get is [~/ellcc/ellcc] main% ./nios2-elf-ecc -S test.c

OK, so the next thing I found in Sparc world is that sparc-elf-as doesn't understand .bss as a directive for some reason. I modified the Sparc code generator to output .section ".bss" and that works just fine. My (temporary) solution is a hack, however: ================================================================== --- SparcAsmPrinter.cpp (revision 720) +++

On Jul 31, 2008, at 9:57 AM, Dale Johannesen wrote: > > On Jul 31, 2008, at 4:52 AMPDT, Richard Pennington wrote: > >> Any code that I generate for the Sparc fails at assembly time using a >> gas assembler built for the Sparc. >> >> I get code like the following from the code generator: >> >> save -96, %o6, %o6 >> >> and get a syntax

I've started hacking up a branch with a rough implementation of equality saturation. This needs me to add objects such as PEGBasicBlock, PEGInstruction, PEGTerminatorInstruction, etc. (PEG stands for "program expression block"). I wish to share most of the infrastructure that exists - I believe this is already done with Machine*. How do I do this for PEGs? I'd also like to get

Chris Lattner wrote: > This is probably a difference between the sun and GNU assemblers. > There is no current sparc maintainer, so feel free to change it if one > way works better for you. Hi Chris, Here's the fix: Index: SparcRegisterInfo.cpp =================================================================== --- SparcRegisterInfo.cpp (revision 700) +++

On Dec 21, 2007, at 1:08 PM, Richard Pennington wrote: > I'm a little further along now. I've started to put together a simple > driver for Elsa and LLVM that I'm calling "ellsif" (cute name, I think > it works). > > The file being compiled is a "printf" function. Here are timing > results > for optimized and unoptimized runs: Cool, this is

On 11 Sep 2017, at 21:32, Sean Silva via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > As a data point for this, I did a quick walkthrough of the top-level of instcombine, and one thing that stuck out to me is that it tries to sink instructions in certain "easy" scenarios. That doesn't fit a graph rewriting system. The sinking in instcombine is not always a win. We

Hello, Everyone > On this specific case, IIRC, MinGW chokes if asmprinter is not on the > list of components. This may be another consequence of the malfunctoning > of llvm-config/GenLibDeps.pl on MinGW/MSYS. This works for me without any problems on mingw32. What are the problems you're seeing? -- WBR, Anton Korobeynikov

> I'd love to see a solution where most of the transformations were > specified in TableGen files and: > 1. We, as a result, had an easy way to convert these into a form where > some SMT-solver-based checker could certify correctness. > 2. We, as a result, has an easy way to somehow check soundness, as a > rewrite system, so we'd know it would reach a fixed point

Just thinking out loud…. I’m really not familiar with the vast majority of what instcombine does, so please excuse me if my naiveté is too obvious. I can’t help but notice all of the uses of ‘and’ in Daniel B’s description of what instcombine is right now: > On Sep 8, 2017, at 11:27 PM, Daniel Berlin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > FWIW, Before getting to