similar to: [LLVMdev] rol/ror llvm instruction set

Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] rol/ror llvm instruction set"

2009 Feb 03
0
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 2:28 PM, Kasra wrote: > I was looking around the LLVM instruction set and I failed to find > ROL and ROR instructions. Is there any plans on adding these > instructions to LLVM? Not sure what you mean: $ cat t.c unsigned int rol(unsigned int i) { return i << 1 | i >> 31; } mrs $ clang -S t.c -O2 mrs $ cat t.s .text .align 4,0x90 .globl _rol
2009 Feb 03
2
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > On Feb 3, 2009, at 2:28 PM, Kasra wrote: >> I was looking around the LLVM instruction set and I failed to find >> ROL and ROR instructions. Is there any plans on adding these >> instructions to LLVM? > > Not sure what you mean: He's referring to the LLVM IR, I think, and it's true that doesn't have
2009 Feb 03
0
[LLVMdev] rol/ror llvm instruction set
On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >>
2009 Feb 03
6
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote: > From: Bill Wendling <isanbard at gmail.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Cc: kasra_n500 at yahoo.com > Date: Tuesday, February 3, 2009, 2:52 PM > On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen
2009 Feb 04
1
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Owen Anderson <resistor at mac.com> wrote: > From: Owen Anderson <resistor at mac.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:20 PM > On Feb 3, 2009, at 3:54 PM, Kasra wrote: > > I guess the
2009 Feb 04
0
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 3:54 PM, Kasra wrote: > I guess the backends could know about the instructions. But I am not > convinced why it is beneficial not to have ROR and ROL instructions > within llvm. > How would it be beneficial to have them, if we already generate them at the target level properly? Adding instructions "just because" doesn't seem wise. -Owen
2009 Feb 04
0
[LLVMdev] rol/ror llvm instruction set
On Tue, Feb 3, 2009 at 3:54 PM, Kasra <kasra_n500 at yahoo.com> wrote: > > I guess the backends could know about the instructions. But I am not convinced why it is beneficial not to have ROR and ROL instructions within llvm. > I guess I could ask you the opposite question: What is the benefit of having these? They would have to be mappable to the source language in some way. I'm
2009 Feb 04
1
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote: > From: Bill Wendling <isanbard at gmail.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:17 PM > On Tue, Feb 3, 2009 at 3:54 PM, Kasra > <kasra_n500
2009 Feb 04
0
[LLVMdev] rol/ror llvm instruction set
Dale Johannesen wrote: >On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >> >> Not sure what you mean: > > He's referring to the LLVM
2009 Feb 08
0
[LLVMdev] rol/ror llvm instruction set
Thanks Nick for the compile. I think the case for rol/ror is closed. Since LLVM optomises the code into rotations anyway. -- Kasra
2009 Jan 30
3
[LLVMdev] [LLVM][g++] A helping hand
--- On Fri, 1/30/09, Török Edwin <edwintorok at gmail.com> wrote: > From: Török Edwin <edwintorok at gmail.com> > Subject: Re: [LLVMdev] [LLVM][g++] A helping hand > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc..edu> > Date: Friday, January 30, 2009, 8:29 AM > On 2009-01-30 18:19, Kasra wrote: > > Hi All, >
2009 Jan 30
0
[LLVMdev] [LLVM][g++] A helping hand
On 2009-01-30 18:19, Kasra wrote: > Hi All, > > I was looking into using LLVM with C++. Currently there is almost no C++ support (C support only). > LLVM is written in C++, has a C++ API, and llvm-gcc frontend can compile C++ programs. What exactly is the C++ support you are missing? Best regards, --Edwin
2010 Mar 07
1
[LLVMdev] Virtual OS
Hi, I have been away from the list for a while, so do apologize in advance if the topic is slightly off topic here. I have started a hobby project to create a virtual OS library (jos). The idea was to create a set of C API's for operating system specific tasks i.e. File IO, threading and etc. For example: typedef jos_handle jos_thread; jos_thread jos_thread_create(...); void
2009 Feb 04
2
[LLVMdev] rol/ror llvm instruction set
Hi Bill, > I guess I could ask you the opposite question: What is the benefit of > having these? They would have to be mappable to the source language in > some way. I'm not sure about Ada, but I don't know of a "rotate" > operator for any of the C variants, or any other high-level language.. Ada has rotate. Ciao, Duncan.
2009 Feb 04
0
[LLVMdev] rol/ror llvm instruction set
On Tue, Feb 3, 2009 at 10:23 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi Bill, > >> I guess I could ask you the opposite question: What is the benefit of >> having these? They would have to be mappable to the source language in >> some way. I'm not sure about Ada, but I don't know of a "rotate" >> operator for any of the C variants, or
2015 Nov 19
2
rol/ror IR support question
Hi all, Is it planned to add support of rotations to IR? Thanks, Aleksey Zasenko -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151119/c897b935/attachment.html>
2009 Mar 29
2
[LLVMdev] [JIT] JIT trace tree works
Hi guys, I was looking arround Firefox 3.1 js JIT (TraceMonkey), it made me wonder if there is anyone working on a trace-tree technique for optimising the runtime over head of LLVM JIT?? ---------------------------------------------------------------- With Best Regards Mr. Kasra Nassiri Department of Mathematics & Computer Science Imperial College London
2009 Mar 30
0
[LLVMdev] [JIT] JIT trace tree works
No. I am not aware of any/ Evan On Mar 29, 2009, at 9:48 AM, Kasra wrote: > > Hi guys, > > I was looking arround Firefox 3.1 js JIT (TraceMonkey), it made me > wonder if there is anyone working on a trace-tree technique for > optimising the runtime over head of LLVM JIT?? > > ---------------------------------------------------------------- > With Best Regards >
2009 Apr 01
1
[LLVMdev] [JIT] JIT trace tree works
On Mar 29, 2009, at 5:31 PM, Evan Cheng wrote: > > On Mar 29, 2009, at 9:48 AM, Kasra wrote: > >> >> Hi guys, >> >> I was looking arround Firefox 3.1 js JIT (TraceMonkey), it made me >> wonder if there is anyone working on a trace-tree technique for >> optimising the runtime over head of LLVM JIT?? >> > >LLVM directly supports this sort of
2013 Nov 10
0
[LLVMdev] [Target] Custom Lowering expansion of 32-bit ISD::SHL, ISD::SHR without barrel shifter
I had a similar problem with a backend for the 68HC12 family which also has no barrel shifter. Some 68HC12 CPUs support shift for just one of the 16-bit registers and only support rotation on the 2 8-bit subregs of that 16-bit register. That means the only practical solution for 32-bit shifts is to lower to a libcall but my situation for 16-bit shifts sounds similar to yours for 32-bit shifts. I