similar to: [LLVMdev] Copy Instructions?

On Tue, Jan 27, 2009 at 2:54 PM, David Greene <dag at cray.com> wrote: > How do I go about creating the copy t = x? I don't want to use an add with a > zero constant because it may not be optimized in all circustations (floating > point, for example). You can use a no-op bitcast for scalars, but there isn't any reliable way to do it for all first-class values. That said,

On Tuesday 27 January 2009 18:28, Eli Friedman wrote: > You can use a no-op bitcast for scalars, but there isn't any reliable > way to do it for all first-class values. Guh. > That said, I don't quite follow the issue. This is SSA, so the only way a > value can change is if you change the code. This isn't (yet) SSA. This is mem2reg turning things into SSA. >

On Jan 28, 2009, at 9:06 AM, David Greene wrote: > On Tuesday 27 January 2009 18:28, Eli Friedman wrote: > >> You can use a no-op bitcast for scalars, but there isn't any reliable >> way to do it for all first-class values. > > Guh. > >> That said, I don't quite follow the issue. This is SSA, so the >> only way a >> value can change is if

Hi, I am emitting llvm bit code using llvm-gcc -c -emit-llvm -O0 -o test.bc test.c and then optimizing it with opt -O3 -print-module test.bc in order to obtain a dump of generated IR. The resulting code has Phi nodes and is perhaps in SSA form. I want to undo the SSA form while retaining all the other optimizations. Is mem2reg the right optimization to be added after -O3, i.e., opt -O3

On Wednesday 28 January 2009 11:32, Chris Lattner wrote: > On Jan 28, 2009, at 9:06 AM, David Greene wrote: > > On Tuesday 27 January 2009 18:28, Eli Friedman wrote: > >> You can use a no-op bitcast for scalars, but there isn't any reliable > >> way to do it for all first-class values. > > > > Guh. > > > >> That said, I don't quite

On 01/22/2011 10:30 PM, Surinder wrote: > Hi, > > I am emitting llvm bit code using > > llvm-gcc -c -emit-llvm -O0 -o test.bc test.c > > and then optimizing it with > > opt -O3 -print-module test.bc > > in order to obtain a dump of generated IR. > > > The resulting code has Phi nodes and is perhaps in SSA form. I want > to undo the SSA form while

On Nov 28, 2010, at 2:20 AM, Bill Wendling wrote: > On Nov 27, 2010, at 4:57 PM, John McCall wrote: > >> On Nov 25, 2010, at 3:03 AM, Duncan Sands wrote: >>> I'm pointing out that if the invoke instruction >>> is removed and catch information is attached to entire basic blocks, then if no >>> care is taken then it is perfectly possible to use %x before

On Nov 28, 2010, at 1:57 PM, Bill Wendling wrote: > On Nov 28, 2010, at 2:59 AM, John McCall wrote: > >> On Nov 28, 2010, at 2:20 AM, Bill Wendling wrote: >> >>> On Nov 27, 2010, at 4:57 PM, John McCall wrote: >>> >>>> On Nov 25, 2010, at 3:03 AM, Duncan Sands wrote: >>>>> I'm pointing out that if the invoke instruction

Hi Thanks for your answers so far. I am currently stumbling into new questions. Naive as i am, i thought that the llvm-bytecode is allways in SSA form. But this doesn't seem to be the case. At least there are no phi instructions embedded if the bytecode drops out of llvm-gcc? Looking into the archives this has been discussed before:

On Nov 28, 2010, at 3:47 PM, John McCall wrote: > This is well-formed SSA; the alloca instruction %x is in the entry block and thus dominates both the store in %try and the load in %catch. mem2reg wants to eliminate %x and replace the load in %catch with a fixed value. This involves looking at the value stored in %x at all predecessor points, which is a challenge because one of those

On Nov 25, 2010, at 3:03 AM, Duncan Sands wrote: > I'm pointing out that if the invoke instruction > is removed and catch information is attached to entire basic blocks, then if no > care is taken then it is perfectly possible to use %x before it is defined as > explained in my previous email, blowing up the entire LLVM system. Clearly the > solution is to not allow this by not

So my best bet is to try and work in reg2mem mode and then go back to mem2reg? I'm curious, it seems though when you split a block that the phis get updated, right? On Thu, Feb 2, 2012 at 5:05 PM, Eric Christopher <echristo at apple.com> wrote: > Not that I'm aware of. > > -eric > > On Feb 2, 2012, at 3:47 PM, Ryan Taylor wrote: > > So essentially I'm

On Nov 28, 2010, at 2:59 AM, John McCall wrote: > On Nov 28, 2010, at 2:20 AM, Bill Wendling wrote: > >> On Nov 27, 2010, at 4:57 PM, John McCall wrote: >> >>> On Nov 25, 2010, at 3:03 AM, Duncan Sands wrote: >>>> I'm pointing out that if the invoke instruction >>>> is removed and catch information is attached to entire basic blocks, then

The clone llvm:CloneBasicBlock copies the phi function in the replicated basic block from the original basic block. I don't want the copy of phi in relplicated block. For now I am creating .bc file with -O0 option so that it doesn't generate phi function in first place. Is this a good approach or there are some other function available for it. Tarun On Sun, Apr 17, 2011 at 5:22 AM, Eli

On Jan 28, 2009, at 9:50 AM, David Greene wrote: > How can a set of phis with a dependence execute simultaenously? > There is only one definition of x and it has to happen before the > use of > x in the phi defining y, doesn't it? > The "normal" answer would be that they execute atomically only at the IR level. Part of the out-of-SSA translation that happens in

On Nov 27, 2010, at 4:57 PM, John McCall wrote: > On Nov 25, 2010, at 3:03 AM, Duncan Sands wrote: >> I'm pointing out that if the invoke instruction >> is removed and catch information is attached to entire basic blocks, then if no >> care is taken then it is perfectly possible to use %x before it is defined as >> explained in my previous email, blowing up the

---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Mon, Feb 6, 2012 at 10:36 AM Subject: Re: [LLVMdev] Updating PHI for Instruction Domination? To: Eric Christopher <echristo at apple.com> Since I'm not sure which instructions I might want to replicate, would it be possible to cast the Value from "PHINode::getIncomingValue" to

Is there a simple way to require a pass, e.g., Reg2Mem/Mem2Reg, to run before/after my transformation pass? Or do I do something like: struct myOpt { myOpt() { mBefore = createDemoteRegisterToMemoryPass(); mAfter = createPromoteMemoryToRegisterPass(); } getAnalysisUsage(AU) { AU.addRequired(my stuff); mBefore.getAnalysisUsage(AU); mAfter.getAnalysisUsage(AU); }

On 30.8.2011, at 19.19, Eli Friedman wrote: > reg2mem won't do quite this transformation... not sure exactly what you need. I need to get rid of phis. This code is compiled from C++ and for some functions there are no phis, but multiple call instructions. I am targeting hardware in the end, and the next tool reading the IR does not like phis when it's generating VHDL. My questions may

On Feb 2, 2012, at 5:13 PM, Ryan Taylor wrote: > So my best bet is to try and work in reg2mem mode and then go back to mem2reg? > I wouldn't. That sounds painful. > I'm curious, it seems though when you split a block that the phis get updated, right? Sure. There's code in splitBasicBlock to do this. It should just take a little bit of work to get what you want done.