similar to: [LLVMdev] Get Maximum Instruction Index

I would like to make a suggestion. In the LiveIntervalAnalysis class, instead of numbering the instructions in the order in which basic blocks are stored in the machine function, use the df_ext_iterator. It will order the instruction according to the dominance tree (or it seems to be doing so). There are many advantages in doing this. One of them is that, once you traverse the dominance tree

On Thu, 21 Jun 2007, Fernando Magno Quintao Pereira wrote: > I would like to make a suggestion. In the LiveIntervalAnalysis class, > instead of numbering the instructions in the order in which basic blocks > are stored in the machine function, use the df_ext_iterator. It will order > the instruction according to the dominance tree (or it seems to be doing > so). There are many

Nice idea. Please also try using SmallPtrSet (with a sufficiently large size) instead of std::set for traversal after everything is working. Using std::set can really hurt compile time in case of large basic block numbers. Is there a way to dynamically adjust "SmallSize" based on number of basic blocks in the function? Evan On Jun 21, 2007, at 10:20 PM, Fernando Magno Quintao

Hi, In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to compute the MBB2IdxMap, by remembering for each MBB its start and end instruction numbers: unsigned MIIndex = 0; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { unsigned StartIdx = MIIndex; for (MachineBasicBlock::iterator I = MBB->begin(), E =

Hi I'm seeing something probably related to this. I'm getting an assert from the lower_bound in LiveIntervals::findLiveinMBBs (from a checking std:: VS2005 implementation). Idx2MBBMap has two elements in it, both of which have a .first of 0. (I believe because of an empty MBB in the function below, so StartIndex doesn't advance). scott On Wed, Apr 16, 2008 at 2:52 AM, Roman

Can you file a bug so I don't forget? I'm a little occupied right now. But I'll take care of this soon. Evan On Apr 16, 2008, at 10:52 AM, Scott Graham wrote: > Hi > > I'm seeing something probably related to this. I'm getting an assert > from the lower_bound in LiveIntervals::findLiveinMBBs (from a checking > std:: VS2005 implementation). Idx2MBBMap has two

Hi, Just my two cents: If I recall correctly, in some papers on the linear scan register allocation people described that they tried different orderings for instruction numbering, e.g. including DFS or based on the loop nesting levels, etc. There was no clear winner though. But let's see the numbers anyway. May be it really brings some improvements. -Roman Chris Lattner wrote: > On

Dear guys, I want to coalesce some copies, and I would like to know if there is any method that I can call, like JoinCopy from the old (LLVM 1.9) LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM 2.1), but I do not want to call this analysis, as I have my own. basically, I can determine that two virtuals do not overlap, and I know that it is safe to join them. In

LiveVariables gives you something like liveness analysis: where each variable is alive, that is, across each basic blocks, where it is defined, and where it is killed. LiveIntervals gives you a linear representation of the variables as a set of intervals. Yes, it handle holes in the live ranges. There is a very nice description of these analysis and related data structures here:

Fernando Magno Quintao Pereira wrote: > LiveVariables gives you something like liveness analysis: where each > variable is alive, that is, across each basic blocks, where it is defined, > and where it is killed. If I read this correctly, it means that at each instruction there's a list of live variables? I'm trying to figure out how to get at this information to build the

On Dec 15, 2007, at 4:45 PM, Fernando Magno Quintao Pereira wrote: > > Dear guys, > > I want to coalesce some copies, and I would like to know if > there is > any method that I can call, like JoinCopy from the old (LLVM 1.9) > LiveIntervals class. I found it in SimpleRegisterCoalescing (LLVM > 2.1), > but I do not want to call this analysis, as I have my own.

Dear LLVM'ers (or whatever name you will soon have), I want to create a pass option, that I could pass at command line, and that would be visible among many different MachineFunction passes. It would be something like the join-liveintervals used in LiveIntervalAnalysis, but I want my option to be visible among many passes, and not only one. I browsed the documentation, but I did not

Dear Dave, Evan, thank you for answering. What I did was to remove the implementation of most of the methods of SimpleRegisterCoalescing and put them in a single class (RegisterCoalescer_Impl) that is not an analysis. Any class that wants these methods, can extend this class privately, or can use a reference to an RegisterCoalescer_Impl object. I wish it would be possible to go even

Chris Lattner wrote: > On Thu, 12 Apr 2007, David Greene wrote: >> As I work toward improving LLVM register allocation, I've >> come across the need to do some refactoring. > > cool. :) One request: Evan is currently out on vacation until Monday. > This is an area that he is very interested in and will want to chime in > on. Please don't start anything

On 11/23/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > > Hi, Sanjiv, > > those passes operate on the whole machine function. Each machine > function contains many basic blocks. If a program has many functions, the > register allocator will be called as many times, i.e it does not do > interprocedural allocation. > > best, > >

Hi Florian, we though about using UIUC, like in LLVM. Do you guys know if that could be a problem, given that we are mining the functions from github? > Have you thought about integrating the benchmarks as external tests into LLVM’s test-suite? That would make it very easy to play around with. We did not think about it actually. But we would be happy to do it, if the community accepts

Dear LLVMers, I need help with one error in my register allocator. I am getting errors when folding instructions for the x86 (it does not happen when I use the PowerPC as target). The problem is that, when I execute something like: mi = mbb->insert(mbb->erase(mi), fmi), where mbb is a MachineBasicBlock, valgrind gives this error message: Address 0x42C62B0 is 24 bytes inside a block

Hey, guys, I am creating some move instructions with MRegisterInfo::copyRegToReg. How do I get a pointer to the instruction that I just created? Is there a way to do something like: // mbb is MachineBasicBlock, reg_info is MRegisterInfo MachineBasicBlock::iterator iter = mbb.getFirstTerminator(); reg_info->copyRegToReg(mbb, iter, dst, src, rc); iter--; (???) MachineInstr *

>> And I have a quite fast algo that I believe is simpler than [Budimlic02] >> and I can share it with you :) > > Do you have a paper on this? I'd be interested in seeing it. > Yes, I have a tech report on this page: http://compilers/fernando/projects/soc/ and I have submitted a paper to SAS, and now I am waiting for the review. The coalescing algorithm is described in

Dear guys, what is the best way to implement a swap of floating point registers in X86? For the integer registers, I am using xchg. Is there a similar instruction for floating point? My function to insert swaps is like: void X86RegisterInfo::swapRegs( MachineBasicBlock & mbb, MachineBasicBlock::iterator mi, unsigned r1, unsigned r2, const TargetRegisterClass